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参数资料
| 型号： | P0528 |
| 厂商： | Terasic Technologies Inc |
| 文件页数： | 22/56页 |
| 文件大小： | 0K |
| 描述： | BOARD DEV DE1 ALTERA |
| 标准包装： | 1 |
| 类型： | FPGA |
| 适用于相关产品： | Cyclone II 2C20 |
| 所含物品： | DE1 板，电源，USB 线缆，塑料盖和软件 |
| 配用： | P0033-ND - BOARD ADAPTER HSMC TO GPIO P0006-ND - BOARD ADAPTER THDB-SUM P0001-ND - MODULE DIGITAL CAMERA 5MP (D5M) P0307-ND - KIT DEV 4.3" LCD TOUCH PANEL |
| 相关产品： | 544-2107-ND - IC CYCLONE II FPGA 20K 240-PQFP 544-2106-ND - IC CYCLONE II FPGA 20K 240-PQFP 544-2105-ND - IC CYCLONE II FPGA 20K 484-FBGA 544-2104-ND - IC CYCLONE II FPGA 20K 484-FBGA 544-2103-ND - IC CYCLONE II FPGA 20K 256-FBGA 544-2102-ND - IC CYCLONE II FPGA 20K 256-FBGA 544-2101-ND - IC CYCLONE II FPGA 20K 484-FBGA 544-1781-ND - IC CYCLONE II FPGA 20K 256-FBGA 544-1670-ND - IC CYCLONE II FPGA 20K 484-FBGA 544-1669-ND - IC CYCLONE II FPGA 20K 484-FBGA 更多... |
| 其它名称： | DE1 |
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DE1 User Manual
The image in Figure 3.9 is stored in an M4K memory block in the Cyclone II FPGA. It is loaded
into the M4K block in the MIF/Hex(Intel) format during the default bit stream configuration stage.
We will next describe how you can display other images and use your own images to generate the
binary data patterns that can be displayed on the VGA monitor.
Another image is provided in the file picture.dat in the folder DE1_demonstrations\pictures on the
DE1 System CD-ROM . You can display this image as follows:
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Select the SRAM page of the Control Panel and load the file picture.dat into the SRAM.
Select the TOOLS page and choose Asynchronous 1 for the SRAM multiplexer port as
shown in Figure 3.10. Click on the Configure button to activate the multi-port setup.
Figure 3.10. Use the Asynchronous Port 1 to access the image data in the SRAM.
The FPGA is now configured as indicated in Figure 3.11.
Select the VGA page and deselect the checkbox Default Image .
The VGA monitor should display the picture.dat image from the SRAM, as depicted in
Figure 3.12. You can turn off the cursor by deselecting the Cursor Enable checkbox.
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