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| 型号： | P87C380 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(带DDC接口，同步监测和同步处理的监视器微控制器) |
| 中文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP42 |
| 封装： | 0.600 INCH, PLASTIC, SOT-270-1, SDIP-42 |
| 文件页数： | 10/84页 |
| 文件大小： | 420K |
| 代理商： | P87C380 |
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1997 Dec 12
10
Philips Semiconductors
Product specification
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
P83Cx80; P87C380
3.
Indirect-addressable via MOVX-Datapointer or
MOVX-Ri instructions.
7.2.1
RAM
Four register banks, each 8 registers wide, occupy
locations 0 through 31 in the lower RAM area. Only one of
these banks may be enabled at a time. The next 16 bytes,
locations 32 through 47, contain 128 directly addressable
bit locations. The stack can be located anywhere in the
internal 256 bytes RAM. The stack depth is only limited by
the available internal RAM space of 256 bytes (see Fig.4).
7.2.2
S
PECIAL
F
UNCTION
R
EGISTERS
(SFR
S
)
The SFRs can only be addressed directly in the address
range from 128 to 255 (see Fig.3). Figure 5 gives an
overview of the Special Function Registers space. Sixteen
address in the SFRs space are both byte and
bit-addressable. The bit-addressable SFRs are those
whose address ends in 0H and FH. The bit addresses in
this area are 80H to FFH
7.2.3
AUX-RAM
AUX-RAM buffer 0 to 255 is indirectly addressable as
external data memory locations 0 to 255 via
MOVX-Datapointer instruction or via MOVX-Ri instruction.
Since the external access function is not available, any
access to AUX-RAM 0 to 255 will not affect the ports.
The 256 bytes of AUX-RAM buffer used to support DDC
interface is also available for system usage by indirect
addressing through the address pointer DDCADR and
data I/O buffer RAMBUF. The address pointer (DDCADR)
is equipped with the post increment capability to facilitate
the transfer of data in bulk (for details refer to Chapter 17).
However, it is also possible to address the AUX-RAM
buffer through MOVX command as usually used in the
internal RAM extension of 80C51 derivatives.
Fig.4 RAM bit addresses.
MBH079
7F
77
6F
67
5F
57
4F
47
3F
37
2F
27
1F
17
0F
07
7E
76
6E
66
5E
56
4E
46
3E
36
2E
26
1E
16
0E
06
7D
75
6D
65
5D
55
4D
45
3D
35
2D
25
1D
15
0D
05
7C
74
6C
64
5C
54
4C
44
3C
34
2C
24
1C
14
0C
04
7B
73
6B
63
5B
53
4B
43
3B
33
2B
23
1B
13
0B
03
7A
72
6A
62
5A
52
4A
42
3A
32
2A
22
1A
12
0A
02
79
71
69
61
59
51
49
41
39
31
29
21
19
11
09
01
78
70
68
60
58
50
48
40
38
30
28
20
18
10
08
00
18H
17H
10H
0FH
08H
07H
00H
24
23
31
16
15
8
7
0
BANK 0
BANK 1
BANK 2
BANK 3
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
(MSB)
(LSB)
255
FFH
2FH
2EH
2DH
2CH
2BH
2AH
29H
28H
27H
26H
25H
24H
23H
22H
21H
20H
1FH
BYTE
ADDRESS
(DECIMAL)
BYTE
ADDRESS
(HEX)
BIT ADDRESS
(HEX)
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