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| 型号： | P89LPC925FDH |
| 厂商： | NXP Semiconductors N.V. |
| 元件分类： | 8位微控制器 |
| 英文描述： | 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB-8 kB 3 V low-power Flash with 8-bit A-D converter |
| 封装： | P89LPC924FDH<SOT360-1 (TSSOP20)|<<http://www.nxp.com/packages/SOT360-1.html<1<Always Pb-free,;P89LPC925FDH<SOT360-1 (TSSOP20)|<<http://www.nxp.com/packages/SOT360-1.html& |
| 文件页数： | 14/49页 |
| 文件大小： | 233K |
| 代理商： | P89LPC925FDH |
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Philips Semiconductors
P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
Product data
Rev. 03 — 15 December 2004
21 of 49
9397 750 14471
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.9.5
Boundary limits interrupt
The A/D converter has both a high and low boundary limit register. After the four
MSBs have been converted, these four bits are compared with the four MSBs of the
boundary high and low registers. If the four MSBs of the conversion are outside the
limit an interrupt will be generated, if enabled. If the conversion result is within the
limits, the boundary limits will again be compared after all 8 bits have been converted.
An interrupt will be generated, if enabled, if the result is outside the boundary limits.
The boundary limit may be disabled by clearing the boundary limit interrupt enable.
8.9.6
DAC output to a port pin with high output impedance
The A/D converter’s DAC block can be output to a port pin. In this mode, the
AD1DAT3 register is used to hold the value fed to the DAC. After a value has been
written to the DAC, the DAC output will appear on the channel 3 pin.
8.9.7
Clock divider
The A/D converter requires that its internal clock source be in the range of 500 kHz to
3.3 MHz to maintain accuracy. A programmable clock divider that divides the clock
from 1 to 8 is provided for this purpose.
8.9.8
Power-down and idle mode
In idle mode the A/D converter, if enabled, will continue to function and can cause the
device to exit idle mode when the conversion is completed if the A/D interrupt is
enabled. In Power-down mode or Total power-down mode, the A/D does not function.
If the A/D is enabled, it will consume power. Power can be reduced by disabling the
A/D.
8.10 Memory organization
The various P89LPC924/925 memory spaces are as follows:
DATA
128 bytes of internal data memory space (00h:7Fh) accessed via direct or indirect
addressing, using instruction other than MOVX and MOVC. All or part of the Stack
may be in this area.
IDATA
Indirect Data. 256 bytes of internal data memory space (00h:FFh) accessed via
indirect addressing using instructions other than MOVX and MOVC. All or part of
the Stack may be in this area. This area includes the DATA area and the 128 bytes
immediately above it.
SFR
Special Function Registers. Selected CPU registers and peripheral control and
status registers, accessible only via direct addressing.
CODE
64 kB of Code memory space, accessed as part of program execution and via the
MOVC instruction. The P89LPC924/925 has 4 kB/8 kB of on-chip Code memory.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| P89LPC925FDH,529 | 功能描述:8位微控制器 -MCU 80C51 8K FL 256B RAM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC925FDH-S | 制造商:NXP Semiconductors 功能描述:MCU 8-bit P89 80C51 CISC 8KB Flash 2.5V/3.3V 20-Pin TSSOP |
| P89LPC925FN,129 | 功能描述:8位微控制器 -MCU 8K FL/256B RAM/I2C/UART/ADC RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC925FN-S | 功能描述:8位微控制器 -MCU 80C51 8K FL 256B RAM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC92X1 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB 3 V byte-erasable flash with 8-bit ADC |
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