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参数资料
| 型号： | PALLV22V10-15JC |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| 中文描述： | EE PLD, 15 ns, PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 10/19页 |
| 文件大小： | 380K |
| 代理商： | PALLV22V10-15JC |
18
PALLV22V10 and PALLV22V10Z Families
USE
GAL
DEVICES
FOR
NEW
DESIGNS
CONNECTION DIAGRAMS
Top View
VCC
I1
I3
I5
I7
I9
GND
I/O9
I/O7
I/O5
I/O3
I/O1
I11
I/O8
I/O6
I/O4
I/O2
I/O0
CLK/I0
I2
I4
I6
I8
I10
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
4
5
6
7
8
9
10
11
3
2
1
28 27 26
25
24
23
22
21
20
19
12 13 14 15 16 17 18
I3
I4
I5
NC
I6
I7
I8
I/O7
I/O6
I/O5
GND/NC
I/O4
I/O3
I/O2
I 9
I 10
GND
NC
I 11
I/O
0
I/O
1
I 2
I 1
CLK/I
0
NC
V
CC
I/O
9
I/O
8
SKINNY DIP
PLCC
18956D-002
18956D-003
PIN DESIGNATIONS
CLK
= Clock
GND = Ground
I
= Input
I/O
= Input/Output
NC
= No Connect
VCC = Supply Voltage
Note:
Pin 1 is marked for orientation.
相关PDF资料 |
PDF描述 |
|---|---|
| PALLV22V10-15JI | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PALLV22V10-15PC | Header Connector,PCB Mnt,RECEPT,5 Contacts,PIN,0.1 Pitch,PC TAIL Terminal,LOCKING MECH |
| PALLV22V10-7JC | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PLSI1032E-70LJ | High-Density Programmable Logic |
| PLSI1032E-80LJ | High-Density Programmable Logic |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PALLV22V10-15JI | 制造商:Lattice Semiconductor Corporation 功能描述: |
| PALLV22V10-15PC | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PALLV22V10-7JC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PALLV22V10Z-25JI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PALLV22V10Z-25PI | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
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