参数资料
型号: PALLV22V10-15JC
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: PLD
英文描述: Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device
中文描述: EE PLD, 15 ns, PQCC28
封装: PLASTIC, LCC-28
文件页数: 13/19页
文件大小: 380K
代理商: PALLV22V10-15JC
PALLV22V10 and PALLV22V10Z Families
3
USE
GAL
DEVICES
FOR
NEW
DESIGNS
Variable Input/Output Pin Ratio
The PALLV22V10 has twelve dedicated input lines, and each macrocell output can be an I/O pin.
Buffers for device inputs have complementary outputs to provide user-programmable input signal
polarity. Unused input pins should be tied to VCC or GND.
Registered Output Conguration
Each macrocell of the PALLV22V10 includes a D-type ip-op for data storage and synchronization.
The ip-op is loaded on the LOW-to-HIGH transition of the clock input. In the registered
conguration (S1 = 0), the array feedback is from Q of the ip-op.
Combinatorial I/O Conguration
Any macrocell can be congured as combinatorial by selecting the multiplexer path that bypasses
the ip-op (S1 = 1). In the combinatorial conguration, the feedback is from the pin.
S1
S0
Output Conguration
0
Registered/Active Low
0
1
Registered/Active High
1
0
Combinatorial/Active Low
1
Combinatorial/Active High
0 = Programmed EE bit
1 = Erased (charged) EE bit
Figure 1. Output Logic Macrocell Diagram
18956C-004
CLK
S1
10
11
00
01
AR
SP
0
1
I/On
S0
DQ
Q
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相关代理商/技术参数
参数描述
PALLV22V10-15JI 制造商:Lattice Semiconductor Corporation 功能描述:
PALLV22V10-15PC 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device
PALLV22V10-7JC 制造商:Rochester Electronics LLC 功能描述:- Bulk
PALLV22V10Z-25JI 制造商:Rochester Electronics LLC 功能描述:- Bulk
PALLV22V10Z-25PI 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device