- 您现在的位置：买卖IC网 > PDF目录268241 > PALLV22V10-15JC (LATTICE SEMICONDUCTOR CORP) Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device PDF资料下载
参数资料
| 型号： | PALLV22V10-15JC |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| 中文描述： | EE PLD, 15 ns, PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 19/19页 |
| 文件大小： | 380K |
| 代理商： | PALLV22V10-15JC |
PALLV22V10 - 7/10/15 (Com’l), -15 (Ind’l)
9
USE
GAL
DEVICES
FOR
NEW
DESIGNS
CAPACITANCE 1
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modied where
capacitance may be affected.
Notes:
1. See “Switching Test Circuit” for test conditions.
2. These parameters are not 100% tested, but are evaluated at initial characterization and at any time
the design is modied where frequency may be affected.
3. tCF is a calculated value and is not guaranteed. tCF can be found using the following equation:
tCF = 1/fMAX (internal feedback) - tS.
Parameter
Symbol
Parameter Description
Test Condition
Typ
Unit
CIN
Input Capacitance
VIN = 2.0 V
VCC = 3.3 V
TA = 25°C
f = 1 MHz
5
pF
COUT
Output Capacitance
VOUT = 2.0 V
8
SWITCHING CHARACTERISTICS OVER COMMERCIAL AND INDUSTRIAL
OPERATING RANGES 1
Parameter
Symbol
Parameter Description
-7
-10
-15
Unit
Min
Max
Min
Max
Min
Max
tPD
Input or Feedback to Combinatorial Output
7.5
10
15
ns
tS1
Setup Time from Input, Feedback or SP to Clock
4.5
5.5
10
ns
tS2
Setup Time from SP to Clock
5.5
7
10
ns
tH
Hold Time
0
ns
tCO
Clock to Output
5.5
6.5
10
ns
tAR
Asynchronous Reset to Registered Output
11
13
20
ns
tARW
Asynchronous Reset Width
6
8
10
ns
tARR
Asynchronous Reset Recovery Time
6
8
10
ns
tSPR
Synchronous Preset Recovery Time
6
8
10
ns
tWL
Clock Width
LOW
3.5
4
6
ns
tWH
HIGH
3.5
4
6
ns
fMAX
Maximum Frequency
(Note 2)
External Feedback
1/(tS + tCO)
100
83.3
50
MHz
Internal Feedback (fCNT)
1/(tS + tCF) (Note 3) 133
110
58.8
MHz
No Feedback
1/(tWH + tWL)
143
125
83.3
MHz
tEA
Input to Output Enable Using Product Term Control
9
11
15
ns
tER
Input to Output Disable Using Product Term Control
10
11
15
ns
相关PDF资料 |
PDF描述 |
|---|---|
| PALLV22V10-15JI | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PALLV22V10-15PC | Header Connector,PCB Mnt,RECEPT,5 Contacts,PIN,0.1 Pitch,PC TAIL Terminal,LOCKING MECH |
| PALLV22V10-7JC | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PLSI1032E-70LJ | High-Density Programmable Logic |
| PLSI1032E-80LJ | High-Density Programmable Logic |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PALLV22V10-15JI | 制造商:Lattice Semiconductor Corporation 功能描述: |
| PALLV22V10-15PC | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PALLV22V10-7JC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PALLV22V10Z-25JI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PALLV22V10Z-25PI | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
发布紧急采购，3分钟左右您将得到回复。