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参数资料
| 型号： | PALLV22V10-15JC |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| 中文描述： | EE PLD, 15 ns, PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 4/19页 |
| 文件大小： | 380K |
| 代理商： | PALLV22V10-15JC |
12
PALLV22V10 and PALLV22V10Z Families
USE
GAL
DEVICES
FOR
NEW
DESIGNS
SWITCHING WAVEFORMS
Notes:
1. VT = 1.5 V for inputs signals and VCC/2 for outputs signals.
2. Input pulse amplitude 0 V to 3.0 V
.
3. Input rise and fall times 2 ns to 5 ns typical.
tPD
Input or
Feedback
Combinatorial
Output
VT
a. Combinatorial output
VT
Input or
Feedback
Registered
Output
b. Registered output
tS
tCO
VT
tH
VT
Clock
tWH
Clock
c. Clock width
VT
tWL
VT
Input
Output
d. Input to output disable/enable
tER
tEA
VOH - 0.5V
VOL + 0.5V
VT
tARR
tARW
VT
tAR
e. Asynchronous reset
Clock
Registered
Output
Input
Asserting
Asynchronous
Reset
VT
tSPR
VT
tS
f. Synchronous preset
Clock
Registered
Output
Input
Asserting
Synchronous
Preset
tH
tCO
18956D-007
18956D-008
18956D-009
18956D-010
18956D-011
18956D-012
相关PDF资料 |
PDF描述 |
|---|---|
| PALLV22V10-15JI | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PALLV22V10-15PC | Header Connector,PCB Mnt,RECEPT,5 Contacts,PIN,0.1 Pitch,PC TAIL Terminal,LOCKING MECH |
| PALLV22V10-7JC | Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PLSI1032E-70LJ | High-Density Programmable Logic |
| PLSI1032E-80LJ | High-Density Programmable Logic |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PALLV22V10-15JI | 制造商:Lattice Semiconductor Corporation 功能描述: |
| PALLV22V10-15PC | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PALLV22V10-7JC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PALLV22V10Z-25JI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PALLV22V10Z-25PI | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
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