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参数资料
| 型号： | PCM9211PTR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, TOKEN RING TRANSCEIVER, PQFP48 |
| 封装： | GREEN, PLASTIC, LQFP-48 |
| 文件页数： | 60/121页 |
| 文件大小： | 1219K |
| 代理商： | PCM9211PTR |
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www.ti.com
SBAS495 – JUNE 2010
Muting Main Out and AUXOUT is done using Register 6Ah. Hi-Z control for Main Out is set with Register 6Dh.
Assignable Signals to MPO Pins
Both MPO pins have the same function. The following signals can be routed to the MPOs:
DIR flags output (details of signals are described in the Flag section)
DIR Interrupt Output: INT0 and INT1
B frame, serial output of channel status, user data and validity flag of DIR
GPO (general-purpose output), Hi-Z / Logical high or low
DIT biphase Output
XTI buffered Output
RECOUT0 or RECOUT1, two independent multiplexers, are provided
To use the limited pins of the PCM9211 economically, the DIR flag outputs and the GPIO are used at same time
within the number of MPIO pins assigned to DIR flags or to GPIO functions. DIR flags or GPIO can be selected
for each MPIO zone by using Registers MPASEL[1:0], MPBSEL[2:0], and MPCSEL[2:0]
NOTE
To identify the pins in each MPIO group, the convention * represents 0 to 3.
When DIR flags are required on hardware pins, users should select the desired signals with Registers MPA*FLG,
MPB*FLG, and MPC*FLG.
When GPIOs are required, set the I/O direction with GIOA*DIR, GIOB*DIR, and GIOC*DIR registers. When a
GPO (general-purpose output) function is required, set the output data with Registers GPOA*, GPOB*, and
GPOC*. When a GPI (general-purpose input) function is required, the status of the pins with an assigned GPI
function is stored in the GPIA*, GPIB*, and GPIC* registers (these registers are read-only).
MPIO and MPO Assignments
The I/O function of the MPIOs and MPOs are assigned by Registers MPASEL[1:0], MPBSEL[2:0], MPCSEL[2:0],
Table 12. MPIO Group A (Pin: MPIO_A0 – MPIO_A3)
MPASEL[1:0]
DIRECTION
MPIO GROUP A FUNCTION
00
IN
Biphase input (RXIN8/RXIN9/RXIN10/RXIN11)
01
OUT
AVR Application 1 (CLKST, VOUT, XMCKO, INT0) (default)(1)
10
OUT
AVR Application 2 (SBCK, SLRCK, XMCKO, INT0)
11
IN/ OUT
DIR Flags output or GPIOs
(1)
MPIO_A0 to MPIO_A3 are set to Hi-Z by the MPA0HZ to MPA3HZ registers as default.
Copyright 2010, Texas Instruments Incorporated
43
Product Folder Link(s): PCM9211
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