- 您现在的位置：买卖IC网 > PDF目录367933 > PH28F256L18B85 (INTEL CORP) StrataFlash Wireless Memory PDF资料下载
参数资料
| 型号： | PH28F256L18B85 |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | StrataFlash Wireless Memory |
| 中文描述： | 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA79 |
| 封装： | 0.75 MM PITCH, LEAD FREE, VFBGA-79 |
| 文件页数： | 54/106页 |
| 文件大小： | 1272K |
| 代理商： | PH28F256L18B85 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页当前第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页
Intel StrataFlash Wireless Memory (L18)
April 2005
54
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
Datasheet
10.3.3
WAIT Polarity
The WAIT Polarity bit (WP), RCR[10] determines the asserted level (V
OH
or V
OL
) of WAIT.
When WP is set, WAIT is asserted-high (default). When WP is cleared, WAIT is asserted-low.
WAIT changes state on valid clock edges during active bus cycles (CE# asserted, OE# asserted,
RST# deasserted).
10.3.3.1
WAIT Signal Function
The WAIT signal indicates data valid when the device is operating in synchronous mode
(RCR[15]=0). The WAIT signal is only “deasserted” when data is valid on the bus.
When the device is operating in synchronous non-array read mode, such as read status, read ID, or
read query the WAIT signal is also “deasserted” when data is valid on the bus.
WAIT behavior during synchronous non-array reads at the end of word line works correctly only
on the first data access.
When the device is operating in asynchronous page mode, asynchronous single word read mode,
and all write operations, WAIT is set to a deasserted state as determined by RCR[10]. See
Figure
12, “Asynchronous Single-Word Read with ADV# Latch” on page 34
, and
Figure 13,
“Asynchronous Page-Mode Read Timing” on page 34
.
Figure 25.
Example Latency Count Setting
CLK
CE#
ADV#
A[MAX:0]
D[15:0]
t
Data
Code 3
Address
Data
0
1
2
3
4
R103
High-Z
相关PDF资料 |
PDF描述 |
|---|---|
| PH28F256L18T85 | StrataFlash Wireless Memory |
| PH28F640L18B85 | StrataFlash Wireless Memory |
| PH28F640L18T85 | StrataFlash Wireless Memory |
| PH2907A | PNP switching transistor |
| PH2907 | PNP switching transistor |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PH28F256L18B85A | 制造商:Micron Technology Inc 功能描述:MM#875138FLASH 28F256L18B 85 VF-PBGA79 S |
| PH28F256L18T85 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:StrataFlash Wireless Memory |
| PH28F320C3TD70A | 制造商:Micron Technology Inc 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 2M x 16 70ns 48-Pin VFBGA Tray 制造商:Micron Technology Inc 功能描述:MM#869664FLASH 28F320C3TD 70 VF-PBGA47 E |
| PH28F320W18BE60A | 制造商:Micron Technology Inc 功能描述:IC FLASH 32MBIT 60NS VFBGA |
| PH28F320W18BE60B | 制造商:Micron Technology Inc 功能描述:32MB, CRYSTAL .75 VFBGA 1.8 LF - Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。