
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATMTraffic Management Device
Released
Datasheet
153
8.2.1.2
TX_SCQ_STATE (Internal Structure)
Offset: 1
h
(4
h
byte)
Type: Read/Write – Do not write while SW_RESET (refer to
“SW_RESET” on
page 101
) is deasserted.
Format: Refer to the following table.
8.2.1.3
TX_SCQ_HEAD/TX_SCQ_OUT_FIFO_HEAD (Internal Structure)
Offset: 2
h
(8
h
byte)
Type: Read/Write – Do not write while SW_RESET (refer to
“SW_RESET” on
page 101
) is deasserted.
Format: Refer to the following tables.
Not used
(7:3)
Write with a 0 to maintain software compatibility with future versions.
TX_SCQ_EXP_WEIGHT
(2:1)
Defines the weight of the this SCQ in the queue service decision algorithm. The weight
is equal to:
2
(TX_SCQEXP_WEIGHT
×
2)
This allows weights of 1, 4, 16, and 64.
Not used
(0)
Write with a 0 to maintain software compatibility with future versions.
Field (Bits)
Description
Not present
(31:16)
RAM is not present in these bit locations.
TX_SCQ_STATE
(15)
Current SCQ congestion state. Initialize to 0
h
.
TX_SCQ_CUR_QD
(14:0)
Current SCQ service class unicast queue depth. Initialize to 0000
h
. This count does not
include cells that are stored in the per-channel resequencing pointer buffers.
For Unicast SCs
Field (Bits)
Description
Not present
(31:16)
RAM is not present in these bit locations.
TX_SCQ_HEAD
(15:0)
The head of the queue for this SCQ.
(Continued)
Field (Bits)
Description