
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATMTraffic Management Device
Released
Datasheet
60
H2
CH_RAM_ADD
(0)
M2
CH_RAM_ADD
(11)
R26
SE_D_OUT0(0)
W1
3
VSS
AC2
CH_RAM_DAT
A(28)
H3
/
ABR_RAM_AD
V
M3
CH_RAM_ADD
(4)
R27
BP_ACK_IN(3)
W1
5
VSS
AC3
CH_RAM_DAT
A(30)
H4
ABR_RAM_AD(
14)
M4
CH_RAM_ADD
(5)
R28
SE_D_OUT0(2)
W1
7
VSS
AC4
/ALRAM_ADSC
H5
ABR_RAM_AD(
10)
M5
CH_RAM_ADD
(3)
R29
VSS
W1
9
VSS
AC5
ALRAM_ADD(4
)
H25
/
RX_DRAM_CS(
1)
M25
/
RX_DRAM_CA
S
T1
VDD
W2
5
SE_D_IN2(0)
AC2
5
TX_DRAM_DA
TA(22)
H26
RX_DRAM_AD
D(4)
M26
SE_D_OUT2(2)
T2
CH_RAM_DAT
A(6)
W2
6
SE_D_IN2(3)
AC2
6
TX_DRAM_DA
TA(27)
H27
/
RX_DRAM_WE
M27
SE_D_OUT2(0)
T3
CH_RAM_DAT
A(3)
W2
7
SE_D_IN3(3)
AC2
7
TX_DRAM_DA
TA(30)
H28
/
RX_DRAM_CS(
0)
M28
SE_D_OUT3(1)
T4
CH_RAM_DAT
A(2)
W2
8
RX_CELL_STA
RT
AC2
8
SE_D_IN0(1)
H29
VSS
M29
VSS
T5
CH_RAM_DAT
A(1)
W2
9
VDD
AC2
9
VDD
J1
VSS
N1
CH_RAM_ADD
(14)
T25
SE_SOC_IN(2)
Y1
VDD
AD
1
ALRAM_CLK
J2
/CH_RAM_OE
N2
CH_RAM_ADD
(13)
T26
PROC_MON
Y2
CH_RAM_DAT
A(20)
AD
2
ALRAMADD18
N
J3
/CH_RAM_WE0
N3
CH_RAM_ADD
(12)
T27
BP_ACK_OUT(
2)
Y3
CH_RAM_DAT
A(23)
AD
3
CH_RAM_PARI
TY1
J4
/
ABR_RAM_AD
SP
N4
CH_RAM_ADD
(10)
T28
BP_ACK_IN(0)
Y4
CH_RAM_DAT
A(21)
AD
4
ALRAMADD17
N
J5
ABR_RAM_AD(
15)
N5
CH_RAM_ADD
(1)
T29
VSS
Y5
CH_RAM_DAT
A(24)
AD
5
VSS
J25
RX_DRAM_AD
D(1)
N11
VSS
U1
CH_RAM_DAT
A(5)
Y25
SE_D_IN2(2)
AD
25
VSS
J26
RX_DRAM_AD
D(8)
N13
VSS
U2
CH_RAM_DAT
A(7)
Y26
SE_D_IN1(2)
AD
26
TX_DRAM_DA
TA(26)
J27
RX_DRAM_AD
D(3)
N15
VSS
U3
CH_RAM_DAT
A(8)
Y27
SE_D_IN2(1)
AD
27
TX_DRAM_DA
TA(28)
J28
RX_DRAM_CL
K
N17
VSS
U4
CH_RAM_DAT
A(12)
Y28
SE_D_IN3(0)
AD
28
SE_D_IN0(0)
J29
VSS
N19
VSS
U5
CH_RAM_DAT
A(15)
Y29
VDD
AD
29
SE_D_IN1(1)
K1
VDD
N25
RX_DRAM_BA
U11
VSS
Table 7. Signal Locations (Continued)
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name