参数资料
型号: S-812C52AY-Z-G
元件分类: 固定正电压单路输出LDO稳压器
英文描述: 5.2 V FIXED POSITIVE LDO REGULATOR, 0.25 V DROPOUT, PBCY3
封装: LEAD FREE, TO-92, 3 PIN
文件页数: 38/39页
文件大小: 690K
代理商: S-812C52AY-Z-G
W946432AD
512K
× 4 BANKS × 32 BITS DDR SDRAM
PRELIMINARY DATA:11/13/01
8
NOTES
1. All voltages referenced to VSS.
2. Outputs measured with equivalent load:
RT = 50 ohms
VTT
A.C TEST LOAD
Rs = 50 ohms
30pF
3. VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the DC level
of the same. Peak-to-peak noise on VREF may not exceed +/-2% of the DC value.
4. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected
to be set equal to VREF, and must track variations in the DC level of VREF.
5. VID is the magnitude of the difference between the input level on CK and the input level on CK .
6. ICC specifications are tested after the device is properly initialized.
7. VIX is the differential clock cross point voltage where input timing measurement is referenced.
CLK
VssQ
Vix
8. Beyond 8ns tCK, chip maybe in "DLL off" mode
9. WRITE interrupted by READ is not allowed.
Note:
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