参数资料
型号: S29CL032J0JFAM020
厂商: SPANSION LLC
元件分类: PROM
英文描述: 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80
封装: 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80
文件页数: 75/79页
文件大小: 2994K
代理商: S29CL032J0JFAM020
March 30, 2009 S29CD-J_CL-J_00_B3
S29CD-J & S29CL-J Flash Family
77
Data
She e t
Advanced Sector Protection/
Unprotection
Modified Advanced Sector Protection/Unprotection figure and notes. In some subsections, changed
“sector” to “sector group”.
DC Characteristics
Changed ICCB test conditions and ICC1 maximum specification.
Test Specifications
Changed CL.
Asynchronous Operations
Asynchronous Command Write Timing figure: Added note.
Asynchronous Read Operations table: Changed tRC, tACC, tCE for 75 MHz device.
Synchronous Operations
Burst Mode Read for 32 Mb and 16 Mb table: Changed tINDS, tCLKL, tAAVH, and tWADVH1
specifications.
Burst Mode Read figure: Modified period lengths for several specifications.
Erase/Program Operations
Added tWEH and tOEP specifications to table.
Latchup Characteristics
Deleted section.
Common Flash Memory Interface (CFI)
CFI System Interface String table: Modified description of address 1Bh.
CFI Primary Vendor-Specific Extended Query table: Modified data at address 45h.
Revision B3 (March 30, 2009)
Global
Removed “Preliminary”
Changed all instances of VCCQ to VIO
Distinctive Characteristics
Removed “or without” (wrap around) from Programmable Burst Interface bullet
Performance Characteristics
Added notice to refer to programming best practices application note for 32 Mb devices.
Ordering Information
Added S29CL032J to valid OPN diagram.
Corrected valid combinations table.
Input/Output Descriptions and Logic
Symbols
Subscript CC for VCC, IO for VIO, SS for VSS in table.
Changed type for VIO to “Supply”
Changed type for VSS to “Supply”
Block Diagram
Removed DQmax-DQ0 label from inputs to Burst Address Counter and Address Latch.
Removed Amax-A0 label from I/O Buffers.
Table: S29CD016J/CL016J (Top Boot)
Sector and Memory Address Map
Changed Note 2 to refer to Bank 0 and 1 instead of Bank 1 and 2.
Table: 32-Bit Linear and Burst Data
Order
Removed “x16”
Removed “A0:A-1” from Output Data Sequence column for Four Linear Data Transfers.
Removed “A1:A-1” from Output Data Sequence column for Eight Linear Data Transfers.
Programming
Added notice to refer to programming best practices application note for 32 Mb devices.
Table: DC Characteristic, CMOS
Compatible
Changed Max ICCB for S29CL-J to 90 mA.
Table: Burst Mode for 32 Mb and 16 Mb
Corrected values for tBDH with separate values for 16Mb and 32Mb.
Added tWADVS parameter to table.
Figure: Synchronous Command Write/
Read Timing
Added timing definition for tWADVS.
Table: Erase/Program Operations
Appended “from WE# Rising Edge” to tAH description.
Changed tAH Min to 11.75 ns.
Figure: Program Operation Timings
Updated timing diagram to reflect new tAH value.
Figure: Chip/Sector Erase Operation
Timings
Updated timing diagram to reflect new tAH value.
Table: Alternate CE# Controlled Erase/
Program Operations
Removed tWADVS parameter.
Product Overview
Removed “or without”.
Table: Device Bus Operation
Changed “X” to “H” under CLK column for CE# row.
Accelerated Program and Erase
Operations
Removed all mention of accelerated erase.
Unlock Bypass
Removed mention of unlock bypass sector erase.
Simultaneous Read/Write
Added in warning to indicate restrictions on Simultaneous Read/Write conditions.
Section
Description
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