参数资料
型号: S29GL032M10TAIR52
厂商: Spansion Inc.
英文描述: CAP TANT 220UF 2.5V 20% POLY SMD
中文描述: MirrorBit闪存系列
文件页数: 21/159页
文件大小: 5216K
代理商: S29GL032M10TAIR52
Octorber 18, 2004 S29GLxxxM_00_B3
S29GLxxxM MirrorBitTM Flash Family
117
Da tash eet
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or
whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is valid after
the rising edge of the final WE# pulse in the command sequence (prior to the program or erase operation), and
during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause DQ6 to
toggle. The system may use either OE# or CE# to control the read cycles. When the operation is complete, DQ6
stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for
approximately 100 s, then returns to reading array data. If not all selected sectors are protected, the Embedded
Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-sus-
pended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6 toggles.
When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must also use DQ2
to determine which sectors are erasing or erase-suspended. Alternatively, the system can use DQ7 (see the sub-
section on DQ7: Data# Polling).
If a program address falls within a protected sector, DQ6 toggles for approximately 1 s after the program com-
mand sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program al-
gorithm is complete.
Table 37 on page 120 shows the outputs for Toggle Bit I on DQ6. Figure 8, on page 118 shows the toggle bit al-
gorithm. Figure 20, on page 134 shows the toggle bit timing diagrams. Figure 21, on page 134 shows the
differences between DQ2 and DQ6 in graphical form. See also the subsection on DQ2: Toggle Bit II.
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