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参数资料
| 型号： | S29GL256N80FAI010 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 16M X 16 FLASH 3V PROM, 80 ns, PBGA64 |
| 封装： | 13 X 11 MM, 1MM PITCH, FBGA-64 |
| 文件页数： | 21/110页 |
| 文件大小： | 2624K |
| 代理商： | S29GL256N80FAI010 |
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18
S29GLxxxN MirrorBitTM Flash Family
27631A4 May 13, 2004
Adva nce
Inform at i o n
trol signals. Standard address access timings provide new data when addresses
are changed. While in sleep mode, output data is latched and always available to
the system. Refer to the “DC Characteristics” section on page 86 for the
automatic sleep mode current specification.
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of resetting the device to reading
array data. When the RESET# pin is driven low for at least a period of tRP, the
device immediately terminates any operation in progress, tristates all output
pins, and ignores all read/write commands for the duration of the RESET# pulse.
The device also resets the internal state machine to reading array data. The op-
eration that was interrupted should be reinitiated once the device is ready to
accept another command sequence, to ensure data integrity.
Current is reduced for the duration of the RESET# pulse. When RESET# is held
at VSS±0.3 V, the device draws CMOS standby current (ICC5). If RESET# is held
at VIL but not within VSS±0.3 V, the standby current will be greater.
The RESET# pin may be tied to the system reset circuitry. A system reset would
thus also reset the Flash memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
Refer to the AC Characteristics tables for RESET# parameters and to Figure 13
for the timing diagram.
Output Disable Mode
When the OE# input is at VIH, output from the device is disabled. The output pins
are placed in the high impedance state.
Table 2. Sector Address Table–S29GL512N
Sector
A24–A16
Sector Size
(Kbytes/
Kwords)
8-bit
Address Range
(in hexadecimal)
16-bit
Address Range
(in hexadecimal)
SA0
000000000
128/64
0000000–001FFFF
0000000–000FFFF
SA1
000000001
128/64
0020000–003FFFF
0010000–001FFFF
SA2
000000010
128/64
0040000–005FFFF
0020000–002FFFF
SA3
000000011
128/64
0060000–007FFFF
0030000–003FFFF
SA4
000000100
128/64
0080000–009FFFF
0040000–004FFFF
SA5
000000101
128/64
00A0000–00BFFFF
0050000–005FFFF
SA6
000000110
128/64
00C0000–00DFFFF
0060000–006FFFF
SA7
000000111
128/64
00E0000–00FFFFF
0070000–007FFFF
SA8
000001000
128/64
0100000–011FFFF
0080000–008FFFF
SA9
000001001
128/64
0120000–013FFFF
0090000–009FFFF
SA10
000001010
128/64
0140000–015FFFF
00A0000–00AFFFF
SA11
000001011
128/64
0160000–017FFFF
00B0000–00BFFFF
SA12
000001100
128/64
0180000–019FFFF
00C0000–00CFFFF
SA13
000001101
128/64
01A0000–01BFFFF
00D0000–00DFFFF
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PDF描述 |
|---|---|
| S29GL256N80FFI010 | MirrorBit Flash Family |
| S29GL256N80FFI013 | MirrorBit Flash Family |
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| S29WS064N0PBAW011 | 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S29GL256N90FFIR10 | 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 256M-Bit 32M x 8/16M x 16 90ns 64-Pin Fortified BGA Tray |
| S29GL256N90FFIR22 | 制造商:Spansion 功能描述: |
| S29GL256N90TFIR10 | 制造商:Spansion 功能描述:NOR Flash Parallel 3.3V 256Mbit 32M/16M x 8bit/16bit 90ns 56-Pin TSOP Tray 制造商:Spansion 功能描述:Flash - NOR IC |
| S29GL256N90TFIR2 | 制造商:Spansion 功能描述: |
| S29GL256N90TFIR20 | 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 256M-Bit 32M x 8/16M x 16 90ns 56-Pin TSOP Tray 制造商:Spansion 功能描述:Flash - NOR IC |
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