- 您现在的位置：买卖IC网 > PDF目录225141 > S29GL256N80FAI010 (SPANSION LLC) MirrorBit Flash Family PDF资料下载
参数资料
| 型号： | S29GL256N80FAI010 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 16M X 16 FLASH 3V PROM, 80 ns, PBGA64 |
| 封装： | 13 X 11 MM, 1MM PITCH, FBGA-64 |
| 文件页数： | 87/110页 |
| 文件大小： | 2624K |
| 代理商： | S29GL256N80FAI010 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页当前第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页
78
S29GLxxxN MirrorBitTM Flash Family
27631A4 May 13, 2004
Adva nce
Inform at i o n
4. Data bits DQ15-DQ8 are don't cares for unlock and command cycles.
5. Address bits AMAX:A16 are don't cares for unlock and command cycles, unless SA or PA required. (AMAX is the Highest
Address pin.).
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high
(while the device is providing status data).
8. The fourth, fifth, and sixth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more
information. This is same as PPB Status Read except that the protect and unprotect statuses are inverted here.
10. The data value for DQ7 is “1” for a serialized and protected OTP region and “0” for an unserialized and unprotected
SecSi Sector region. See "SecSi Sector Flash Memory Region” for more information. For S29GLxxxNH.: XX18h/18h = Not
Factory Locked. XX98h/98h = Factory Locked. For S29GLxxxNL: XX08h/08h = Not Factory Locked. XX88h/88h = Factory
Locked.
11. Command is valid when device is ready to read array data or when device is in autoselect mode.
12. The system may read and program/program suspend in non-erasing sectors, or enter the autoselect mode, when in the
Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation.
13. The Erase Resume/Program Resume command is valid only during the Erase Suspend/Program Suspend modes.
14. Issue this command sequence to return to READ mode after detecting device is in a Write-to-Buffer-Abort state. NOTE: the
full command sequence is required if resetting out of ABORT while using Unlock Bypass Mode.
15. S29GL512NH/L = 2223h/23h, 220h/01h; S29GL256NH/L = 2222h/22h, 2201h/01h; S29GL128NH/L = 2221h/21h, 2201h/
01h.
16. The Exit command returns the device to reading the array.
17. Note that the password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
18. For PWDx, only one portion of the password can be programmed per each “A0” command.
19. The All PPB Erase command embeds programming of all PPB bits before erasure.
20. All Lock Register bits are one-time programmable. Note that the program state = “0” and the erase state = “1”. Also note
that of both the Persistent Protection Mode Lock Bit and the Password Protection Mode Lock Bit cannot be programmed at the
same time or the Lock Register Bits Program operation will abort and return the device to read mode. Lock Register bits that
are reserved for future use will default to “1's”. The Lock Register is shipped out as “FFFF's” before Lock Register Bit program
execution.
21. If any of the Entry command was initiated, an Exit command must be issued to reset the device into read mode. Otherwise
the device will hang.
22. If ACC = VHH, sector protection will match when ACC = VIH
Protected State = “00h”, Unprotected State = “01h”.
Write Operation Status
The device provides several bits to determine the status of a program or erase
operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 19 and the following subsec-
tions describe the function of these bits. DQ7 and DQ6 each offer a method for
determining whether a program or erase operation is complete or in progress.
The device also provides a hardware-based output signal, RY/BY#, to determine
whether an Embedded Program or Erase operation is in progress or has been
completed.
Note that all Write Operation Status DQ bits are valid only after 4 s delay.
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded
Program or Erase algorithm is in progress or completed, or whether the device is
in Erase Suspend. Data# Polling is valid after the rising edge of the final WE#
pulse in the command sequence.
During the Embedded Program algorithm, the device outputs on DQ7 the com-
plement of the datum programmed to DQ7. This DQ7 status also applies to
programming during Erase Suspend. When the Embedded Program algorithm is
complete, the device outputs the datum programmed to DQ7. The system must
provide the program address to read valid status information on DQ7. If a pro-
相关PDF资料 |
PDF描述 |
|---|---|
| S29GL256N80FFI010 | MirrorBit Flash Family |
| S29GL256N80FFI013 | MirrorBit Flash Family |
| S29JL032H90TAI223 | 2M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
| S29WS064N0PBAW011 | 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| S29WS128N0LBFI111 | 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S29GL256N90FFIR10 | 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 256M-Bit 32M x 8/16M x 16 90ns 64-Pin Fortified BGA Tray |
| S29GL256N90FFIR22 | 制造商:Spansion 功能描述: |
| S29GL256N90TFIR10 | 制造商:Spansion 功能描述:NOR Flash Parallel 3.3V 256Mbit 32M/16M x 8bit/16bit 90ns 56-Pin TSOP Tray 制造商:Spansion 功能描述:Flash - NOR IC |
| S29GL256N90TFIR2 | 制造商:Spansion 功能描述: |
| S29GL256N90TFIR20 | 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 256M-Bit 32M x 8/16M x 16 90ns 56-Pin TSOP Tray 制造商:Spansion 功能描述:Flash - NOR IC |
发布紧急采购，3分钟左右您将得到回复。