参数资料
型号: S3P9664-SM
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封装: 0.300 INCH, SOP-24
文件页数: 115/148页
文件大小: 784K
代理商: S3P9664-SM
S3C9664/P9664 (Preliminary Spec)
CLOCK CIRCUIT
7-1
7
CLOCK CIRCUIT
OVERVIEW
The S3C9664 has two oscillation circuit options, a crystal/ceramic oscillation and an external clock source. The
crystal or ceramic oscillation source provides a maximum 6 MHz clock. The X
IN and XOUT pins connect the
oscillation source to the on-chip clock circuit. External clock and crystal/ceramic oscillator circuits are shown in
Figures 7-1 and 7-2.
S3C9664
XOUT
XIN
Figure 7-1. External Oscillator
S3C9664
XOUT
XIN
Figure 7-2. Main Oscillator Circuit
(Crystal/Ceramic Oscillator)
MAIN OSCILLATOR LOGIC
To increase processing speed and to reduce clock noise, non-divided logic is implemented for the main oscillator
circuit. For this reason, very high resolution waveforms (square signal edges) must be generated in order for the
CPU to efficiently process logic operations.
CLOCK STATUS DURING POWER-DOWN MODES
The two power-down modes, Stop mode and Idle mode, affect clock oscillation as follows:
— In Stop mode, the main oscillator "freezes," halting the CPU and peripherals. The contents of the register file
and current system register values are retained.
RESET operation releases the Stop mode, and starts the
oscillator.
— In Idle mode, the internal clock signal is gated off to the CPU, but not to interrupt control and the timer. The
current CPU status is preserved, including stack pointer, program counter, and flags. Data in the register file
is retained. Idle mode is released by a
RESET or by an interrupt (external or internally-generated).
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