S3C9664/P9664 (Preliminary Spec)
A/D CONVERTER
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A/D CONVERTER
OVERVIEW
The A/D converter (ADC) module uses successive approximation logic to convert analog levels at one of the six
input channels to equivalent 10-bit digital values. The analog input level must lie between the V
DD and VSS
values. The A/D converter has the following components:
— Six multiplexed analog input pins (AD0–AD5)
— Analog comparator with successive approximation logic
— 10-bit A/D conversion data output registers (ADDATAH, ADDATAL)
— ADC control register (ADCON)
An analog-to-digital conversion procedure is initiated when the CPU writes a value to the ADCON register at
address (D8H, Page 0) to select one of the six available input pins. You select the desired input channel by
setting the appropriate bits in the ADCON register.
The S3C9664/P9664 microcontroller performs 10-bit conversions for only one input channel at a time. You can
dynamically select different analog input channels during program execution by manipulating selection bits in the
ADCON register.
During a normal conversion, ADC logic initially sets the successive approximation register to 200H (the
approximate half-way point of an 10-bit register). This register is then updated automatically during each
conversion step. The successive approximation block performs 10-bit conversions for one input channel at a
time. You can dynamically select different channels by mainpulating the channel selection bit value
(ADCON.6–4) in the ADCON register. To start the A/D conversion, you should set a the enable bit, ADCON.0.
When a conversion is completed, ACON.3, the end-of-conversion (EOC) bit is automatically set to 1 and the
result is dumped into the ADDATA register where it can be read. The A/D converter then enters an idle state.
Remember to read the contents of ADDATA before another conversion starts. Otherwise, the previous result will
be overwritten by the next conversion result.
NOTE
Because the ADC does not use sample-and-hold circuitry, it is important that any fluctuations in the
analog level at the AD0–AD5 input pins during a conversion procedure be kept to an absolute minimum.
Any change in the input level, perhaps due to circuit noise, will invalidate the result.