参数资料
型号: S3P9664-SM
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封装: 0.300 INCH, SOP-24
文件页数: 81/148页
文件大小: 784K
代理商: S3P9664-SM
S3C9664/P9664 (Preliminary Spec)
CONTROL REGISTERS
4-13
EP1CSR — Interrupt Endpoint Status Register
Page 0, F2H
Bit Identifier
.7
.6
.5
.4
.3
.2
.1
.0
RESET
RESET Value
0
Read/Write
R/W
b) The belows are configured as OUT mode.
.7
Reserved
.6
OUT_PKT_RDY Clear Bit
0
No effect (when write)
1
Clear OUT_PKT_RDY (bit0) bit
.5-.4
Reserved
.3
STALL Signal Receive Bit
0
MCU can clear this bit
1
SIE sets this bit after sending stall packet
.2
FIFO Flush Bit
0
No effect (when write)
1
FIFO is flushed, and IN_PKT_RDY cleared
.1
Force STALL Bit
0
MCU clears this bit to end the STALL condition
1
Issues a STALL handshake to USB
.0
Out Packet Ready Bit
0
No effect (when write)
1
SIE sets this bit once a valid data is written to the FIFO
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