参数资料
型号: S3P9664-SM
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封装: 0.300 INCH, SOP-24
文件页数: 147/148页
文件大小: 784K
代理商: S3P9664-SM
S3C9664/P9664 (Preliminary Spec)
TIMER 1
11-1
11
TIMER 1
OVERVIEW
The 8-bit timer 1 is an 8-bit general-purpose timer. Timer 1 has the interval timer mode by using the appropriate
T1CON setting.
Timer 1 has the following functional components:
— Clock frequency divider (f
OSC divided by 1024, 256, 64 or 8 ) with multiplexer
— 8-bit counter (T1CNT at address E2H, Page 0), 8-bit comparator, and 8-bit reference data register
(T1DATA at address EEH, Page 0)
— Timer 1 match interrupt generation
— Timer 1 control register, T1CON (at address E3H read/write, Page 0)
FUNCTION DESCRIPTION
Interval Timer Function
The timer 1 module can generate an interrupt: the timer 1 match interrupt (T1_INT). The application's service
routine can detect a pending condition of T1_INT by the software and execute it’s sub-routine. When this case is
used, the T1_INT pending bit must be cleared by the application sub-routine by writing a "0" to the T1CON.0
pending bit.
In interval timer mode, a match signal is generated when the counter value is identical to the value written to the
T1 reference data register, T1DATA. The match signal generates a timer 1 match interrupt (TA_INT) and clears
the counter.
If, for example, you write the value 10H to T1DATA and 0FH to T1CON, the counter will increment until it
reaches 10H. At this point, the Timer 1 interrupt request is generated, the counter value is reset, and counting
resumes.
Timer 1 Control Register (T1CON)
You use the timer 1 control register, T1CON, to
— Enable the timer 1 operating (interval timer)
— Select the timer 1 input clock frequency
— Clear the timer 1 counter, T1CNT
— Enable the timer 1 interrupt
— Clear timer 1 interrupt pending conditions
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