参数资料
型号: SAB-C515-LM
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 16 MHz, MICROCONTROLLER, PQFP80
封装: PLASTIC, MQFP-80
文件页数: 12/162页
文件大小: 771K
代理商: SAB-C515-LM
Semiconductor Group
6-66
On-Chip Peripheral Components
C515
6.4.3 A/D Conversion Timing
An A/D conversion is internally started by writing the SFR DAPR. A write to SFR DAPR will start a
new conversion even if a conversion is currently in progress. The conversion begins with the next
machine cycle, and the BSY flag in SFR ADCON will be set.
The A/D conversion procedure is divided into three parts :
– Sample phase (tS), used for sampling the analog input voltage.
– Conversion phase (tCO), used for the real A/D conversion.
– Write result phase (tWR), used for writing the conversion result into the ADDAT register.
Sample Time tS :
During this time the internal capacitor array is connected to the selected analog input channel and
is loaded with the analog voltage to be converted. The analog voltage is internally fed to a voltage
comparator. With beginning of the sample phase the BSY bit in SFR ADCON is set.
Conversion Time tCO :
During the conversion time the analog voltage is converted into a 8-bit digital value using the
successive approximation technique with a binary weighted capacitor network.
Write Result Time tWR :
At the result phase the conversion result is written into the ADDAT register.
The total A/D conversion time is defined by tADCC which is the sum of the two phase times tS and
tCO. The duration of the three phases of an A/D conversion is specified as shown in figure 6-33.
This figure also shows how an A/D conversion is embedded into the microcontroller cycle scheme
using the relation 6 x t IN = 1 instruction cycle. It also shows the behaviour of the busy flag (BSY)
and the interrupt flag (IADC) during an A/D conversion.
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