参数资料
型号: SC2446ITETRT
厂商: Semtech
文件页数: 15/38页
文件大小: 0K
描述: IC SYNC STEP DOWN CTRLR 28-TSSOP
标准包装: 1
应用: 控制器,DDR
输入电压: 4.7 V ~ 16 V
输出数: 2
输出电压: 可调至 0.5V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 标准包装
产品目录页面: 1358 (CN2011-ZH PDF)
其它名称: SC2446ITEDKR
SC2446
POWER MANAGEMENT
Application Information (Cont.)
I Cin ≈ 0 . 5 I o 1 + D 2 ( I o 1 + I o 2 ) 2 + ( D 1 ? D 2 ? 0 . 5 ) I o 2 .
? v ESR = R esr ( 1 + ) I o .
I Cin ≈ ( D 1 + D 2 ? 1 )( I o 1 + I o 2 ) 2 + ( 1 ? D 2 ) I o 1 + ( 1 ? D 1 ) I o 2 .
Sometimes meeting tight input voltage ripple
specifications may require the use of larger input
capacitance. At full load, the peak-to-peak input voltage
ripple due to the ESR is
δ
2
The peak-to-peak input voltage ripple due to the capacitor
is
2 2
If D 1 >0.5 and D 2 > 0.5, then
Choosing Power MOSFET’s
2 2
? v C ≈
DI o
C in f s
,
Main considerations in selecting the MOSFET’s are power
dissipation, cost and packaging. Switching losses and
conduction losses of the MOSFET’s are directly related to
From these two expressions, C IN can be found to meet the
input voltage ripple specification. In a multi-phase
converter, channel interleaving can be used to reduce ripple.
The two step-down channels of the SC2446 operate at
180 degrees from each other. If both step-down channels
the total gate charge ( C g ) and channel on-resistance
( R ds(on) ). In order to judge the performance of MOSFET’s,
the product of the total gate charge and on-resistance is
used as a figure of merit (FOM). Transistors with the same
FOM follow the same curve in Figure 10.
in the SC2446 are connected in parallel, both the input
and the output RMS currents will be reduced.
50
Ripple cancellation effect of interleaving allows the use of
smaller input capacitors. When converter outputs are
connected in parallel and interleaved, smaller inductors
and capacitors can be used for each channel. The total
output ripple-voltage remains unchanged. Smaller
Cg ( 100 , Rds )
Cg ( 200 , Rds )
Cg ( 500 , Rds )
40
20
inductors speeds up output load transient.
1
0
0
5
10
15
20
When two channels with a common input are interleaved,
the total DC input current is simply the sum of the individual
DC input currents. The combined input current waveform
depends on duty ratio and the output current waveform.
1
Rds
On-resistance (mOhm)
FOM:100*10^{-12}
FOM:200*10^{-12}
FOM:500*10^{-12}
20
Assuming that the output current ripple is small, the
following formula can be used to estimate the RMS value
of the ripple current in the input capacitor.
Let the duty ratio and output current of Channel 1 and
Channel 2 be D 1 , D 2 and I o1 , I o2 , respectively.
If D 1 <0.5 and D 2 <0.5, then
Figure 10. Figure of Merit curves.
The closer the curve is to the origin, the lower is the FOM.
This means lower switching loss or lower conduction loss
or both. It may be difficult to find MOSFET’s with both low
C g and low R ds(on . Usually a trade-off between R ds(on and C g
has to be made.
MOSFET selection also depends on applications. In many
I Cin ≈ D I
+ D 2 I o 2 .
2
1 o 1
2
applications, either switching loss or conduction loss
dominates for a particular MOSFET. For synchronous buck
I Cin ≈ 0 . 5 I o 1 + ( D 1 ? 0 . 5 )( I o 1 + I o 2 ) 2 + ( D 2 ? D 1 + 0 . 5 ) I o 2 .
If D 1 >0.5 and (D 1 -0.5) < D 2 <0.5, then
2 2
If D 1 >0.5 and D 2 < (D 1 -0.5) < 0.5, then
converters with high input to output voltage ratios, the top
MOSFET is hard switched but conducts with very low duty
cycle. The bottom switch conducts at high duty cycle but
switches at near zero voltage. For such applications,
MOSFET’s with low C g are used for the top switch and
? 2004 Semtech Corp.
15
www.semtech.com
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