参数资料
型号: SC2446ITETRT
厂商: Semtech
文件页数: 18/38页
文件大小: 0K
描述: IC SYNC STEP DOWN CTRLR 28-TSSOP
标准包装: 1
应用: 控制器,DDR
输入电压: 4.7 V ~ 16 V
输出数: 2
输出电压: 可调至 0.5V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 标准包装
产品目录页面: 1358 (CN2011-ZH PDF)
其它名称: SC2446ITEDKR
SC2446
POWER MANAGEMENT
Application Information (Cont.)
12
20
P gd =
1
T s
T s
0
∫ v
ce
( t ) i gs ( t ) dt .
For SC2446, there are 4 gate drivers, the total gate driver
v ce ( t )
10
losses is then 4 P gd . For the example in Figure 12, the
power losses for each gate driver is estimated as 122
mW when the operating frequency is about 300kHz. The
5 . 10
1 ? 10
0
0
0
0
8
t
time (s)
? 7
total losses for the 4 gate drivers is then about 488
mW.
Remark 3 : It is beneficial to select low gate charge
MOSFET’s for lower switching losses in the MOSFET
Figure 13 a). Approximated gate driver v ce (t) waveform.
Similarly, the gate drive current is approximated as
package and lower power dissipation in the gate-driving
IC. Once the MOSFET is chosen with a specified input gate
charge, one can adjust the gate driving resistor to balance
the driver IC losses and the power MOSFET switching losses.
To the first order of approximation, smaller gate resistance
t 2 ? ( T 2 )
i gs ( t ) = I gsp (
T 2
) e
t 2
.
leads to higher gate driving current and faster MOSFET
switching. But, the driver incurs more power losses. On
the other hand, larger gate drive resistance limits the gate
Where, I gsp is a scaling parameter proportional to the gate
drive peak current, T 2 is a time constant proportional to
the fall time of v ce . For the example in Figure 13,
I gsp =3.15A, T 2 =0.77T f with T f being measured as ~50 ns.
drive current, which leads to low V ce and less power losses.
But, the MOSFET suffers more switching losses.
Using low gate charge MOSFET’s reduces switching loss.
To prevent shoot-through between the top and the bottom
MOSFET’s during commutation, one MOSFET should be
completely turned off before the other is turned on. In the
1.158
i gs ( t )
1.5
1
0.5
SC2446 the top and the bottom gate drive pulses are
made non-overlapping. When not driving any load, the non-
overlapping commutation intervals from the top to the
bottom and from the bottom to the top gate drives are set
at 90ns. If MOSFET’s are driven from the SC2446, the
non-overlapping commutation times will decrease due to
5 . 10
1 ? 10
0
0
0
0
8
t
time (s)
? 7
finite gate-source voltage rise and fall times. The gate-
source voltage waveforms of the MOSFET’s should not
overlap above their respective thresholds when driven from
the SC2446. Use of low gate charge MOSFET’s reduces
transition times and the tendency of shoot-through. The
combined rise and fall times during both commutations
Figure 13 b). Approximated gate drive current i gs (t)
waveform.
With these parameters, the approximated i gs (t) is plotted
as in Figure 13 b).
Based on the approximation formulae of v ce (t) and i gs (t),
one can calculate the power losses for each gate driver
pair as
should be less than the preset non-overlapping intervals.
Current Sensing (Combi-Sense)
Inductor current sensing is required for the current-mode
control. Although the inductor current can be sensed with
a precision resistor in series with the inductor, a novel
lossless Combi-sense technique is used in the SC2446.
This SEMTECH proprietary technique has the advantages
of
? 2004 Semtech Corp.
18
www.semtech.com
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SC24-471-R 功能描述:INDUCTOR SHIELD 470UH 50MA SMD RoHS:是 类别:电感器,线圈,扼流圈 >> 固定式 系列:SC24 标准包装:500 系列:1331 电感:1.2µH 电流:247mA 电流 - 饱和:247mA 电流 - 温升:- 类型:铁芯体 容差:±10% 屏蔽:屏蔽 DC 电阻(DCR):最大 730 毫欧 Q因子@频率:40 @ 7.9MHz 频率 - 自谐振:130MHz 材料 - 芯体:铁 封装/外壳:0.312" L x 0.115" W x 0.135" H(7.94mm x 2.92mm x 3.43mm) 安装类型:表面贴装 包装:带卷 (TR) 工作温度:-55°C ~ 105°C 频率 - 测试:7.9MHz
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