参数资料
| 型号： | SC410MLTRT |
| 厂商： | Semtech |
| 文件页数： | 14/26页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 3A 10MLPD |
| 标准包装： | 1 |
| 系列： | EcoSpeed® |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.75 V ~ 7.5 V |
| 输入电压： | 5.5 V ~ 24 V |
| 频率 - 开关： | 200kHz ~ 1MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 10-MLPD（3x3） |
| 其它名称： | SC410MLDKR |
SC410
Applications Information (continued)
FB Ripple
Voltage (V FB )
FB threshold
(750mV)
FB Ripple
Voltage
(V FB )
Minimum f SW ~ 25kHz
FB threshold
(750mV)
Inductor
Current
DH
On-time
(T ON )
DC Load Current
DH on-time is triggered when
V FB reaches the FB Threshold.
Inductor
Current
DH
On-time
(T ON )
(0A)
DH On-Time is triggered when
V FB reaches the FB Threshold
40μsec time-out
DL
DL drives high when on-time is completed.
DL remains high until V FB falls to the FB threshold.
Figure 4 — Continuous Mode Operation
Ultrasonic Power Save Operation
The SC410 provides ultrasonic power save operation at
light loads, with the minimum operating frequency fixed
at 22kHz. This is accomplished using an internal timer that
monitors the time between consecutive high-side gate
pulses. If the time exceeds 40μs, DL drives high to turn the
low-side MOSFET on. This draws current from V OUT through
the inductor, forcing both V OUT and V FB to fall. When V FB
drops to the 750mV threshold, the next DH on-time is trig-
gered. After the on-time is completed the high-side
MOSFET is turned off and the low-side MOSFET turns on.
The low-side MOSFET remains on until the inductor
current ramps down to zero, at which point the low-side
MOSFET is turned off.
Because the on-times are forced to occur at intervals no
DL
After the 40μsec time-out, DL drives high if V FB
has not reached the FB threshold.
Figure 5 — Ultrasonic Power Save Operation
Smart Power Save Protection
Active loads may leak current from a higher voltage into
the switcher output. Under light load conditions with
power save enabled, this can force V OUT to slowly rise and
reach the over-voltage threshold, resulting in a hard shut-
down. Smart power save prevents this condition. When
the FB voltage exceeds 10% above nominal (exceeds
825mV), the device immediately disables power-save,
and DL drives high to turn on the low-side MOSFET. This
draws current from V OUT through the inductor and causes
V OUT to fall. When V FB drops back to the 750mV trip point,
a normal T ON switching cycle begins. This method pre-
vents a hard OVP shutdown and also cycles energy from
V OUT back to V IN . Figure 6 shows typical waveforms for the
smart power save feature.
greater than 40μs, the frequency will not fall below
~22kHz. Figure 5 shows ultrasonic power save operation.
14
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