参数资料
型号: SC410MLTRT
厂商: Semtech
文件页数: 22/26页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 10MLPD
标准包装: 1
系列: EcoSpeed®
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.75 V ~ 7.5 V
输入电压: 5.5 V ~ 24 V
频率 - 开关: 200kHz ~ 1MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-VFDFN 裸露焊盘
包装: 标准包装
供应商设备封装: 10-MLPD(3x3)
其它名称: SC410MLDKR
SC410
Applications Information (continued)
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PCB Layout Guidelines
The optimum layout for the SC410 is shown in Figure 11.
This layout shows an integrated FET buck regulator with a
maximum current of 3A. The total PCB area is approxi-
mately 19.1mm x 11.3mm.
PGND Plane
PGND requires its own copper plane with no
other signal traces routed on it.
Copper planes, multiple vias, and wide traces are
needed to connect PGND to input capacitors,
Critical Layout Guidelines
The following critical layout guidelines must be followed
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output capacitors, and the PGND pins on the IC.
The PGND copper area between the input
capacitors, output capacitors, and PGND pins
?
?
?
?
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to ensure proper performance of the device.
? IC Decoupling capacitors
? PGND plane
? AGND island
? FB and other analog control signals
? BST and LX
? Capacitors and Current Loops
IC Decoupling Capacitors
A 0.1 μF capacitor must be located as close as
possible to the IC and directly connected to pins
10 (LDO) and 9 (AGND).
All other decoupling capacitors must be located
as close as possible to the IC.
LX connection
using a Via
must be as small as and as compact as possible
to reduce the area of the PCB that is exposed to
noise due to current flow on this node.
Connect PGND to AGND with a short trace or
0? resistor. This connection should be as close
to the IC as possible.
AGND Island
AGND should have its own island of copper with
no other signal traces routed on this layer that
connects the AGND pins and pad of the IC to the
analog control components.
All of the components for the analog control cir-
cuitry should be located so that the connections
SC410
FB node
VESR node
PGND
Figure 11 — PCB Layout
22
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