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参数资料
| 型号： | SDA20C440 |
| 厂商： | SIEMENS A G |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PQFP80 |
| 封装： | PLASTIC, MQFP-80 |
| 文件页数： | 11/55页 |
| 文件大小： | 990K |
| 代理商： | SDA20C440 |
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SDA 20C440
Semiconductor Group
19
2.5
Ports and I/O Pins
2.5.1
Port 0
Port 0 is an eight-bit bidirectional port for digital I/O. One line of Port 0 (P0.0) is alternatively used
for external interrupts. The port register (P0) is used for reading data from and writing data to the
port pins. Two hardware modes are provided (I/O-mode and output mode), where I/O-mode is
selected by default after reset. During reset, port lines P0.0 and P0.1 have to be held at a logical
high level or left open to prevent the processor from entering the processor test mode.
In I/O-mode (which is the default after reset), an instruction that uses a port’s bit/byte as a source
operand reads a value that is the logical AND of the last value written to the bit/byte and the polarity
being applied to the pin/pins by an external device (this assumes that none of the processor’s
electrical specs are being violated). An instruction that reads a bit/byte, operates on the content, and
writes the result back to the bit/byte, reads the last value written to the bit/byte instead of the logical
level at the pin/pins. Pins comprising a single port can be made a mixed collection of inputs and
outputs by writing a “one” to each pin that is to be an input. Each time an instruction uses a port as
the destination, the operation must write “ones” to those bits that correspond to the input pins.
All the port latches have “one”s written to them by the reset function. If a “zero” is subsequently
written to a port latch, it can be reconfigured as an input by writing a “one” to it. The instructions that
perform a read of, operation on, and write to a port’s bit/byte are INC, DEC, IB, JBC, SET, CL, MV
P.X., CJD, DJNZ, AND, OR, and XOR. The source read by these operations is the last value that
was written to the port, without regard to the levels being applied at the pins. This insures that bits
written to a “one” (for use as inputs) are not inadvertently cleared. Ports 0 has “quasi-bidirectional”
output drivers which comprise an internal pullup resistor. When configured as inputs they pull high
and will source current when externally pulled low.
In Port 0 the output drivers provide source current for a short time if, and only if, software updates
the bit in the output latch from a “zero” to an “one”. Sourcing current only on “zero to one” transition
prevents a pin, programmed as an I/O-line, from sourcing current into the external device that is
driving the input pin.
If a bit in port direction register P0PDR is cleared (i.e. set to 0), the corresponding pin high level is
constantly driven by a strong output transistor. In this case the pin should not be pulled high or low
externally (output mode).
2.5.2
Port 1
Port 1 is a four-bit input port for digital or analog signals (may be used as input to the internal A/D-
converter). Only deselected analog lines may be used as digital inputs. The upper four bits of port 1
register are not implemented and may show random values, if read.
2.5.3 Port 2
Port 2 is a two-bit bidirectional port and may be used as the serial interface receive and transmit
lines.
Port function of Port 2 is the same as for Port 0. The upper six bits of Port 2 register P2 and Port 2
direction register P2PDR are not implemented and may show random values, if read. If the serial
interface is used, the Port 2 function register P2PFR has to be set to 03H. If the serial interface is not
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