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参数资料
| 型号： | SDA20C440 |
| 厂商： | SIEMENS A G |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PQFP80 |
| 封装： | PLASTIC, MQFP-80 |
| 文件页数： | 15/55页 |
| 文件大小： | 990K |
| 代理商： | SDA20C440 |
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SDA 20C440
Semiconductor Group
22
2.7
Serial Interface
The asynchronous serial interface (SART, Serial Asynchronous Receiver & Transmitter) is used for
communication with other controllers or electrical systems. This modul works in full-duplex mode,
so it can send and receive data at the same time. Moreover, it comprises a dedicated programmable
baud-rate generator.
Port 2.0 and Port 2.1 are used for input and output of the serial data. To allocate these pins to the
SART-module, the according bits of the port function register in the special function register must be
set.
Three types of data transmission errors are detected: Parity-, Framing- and Overwrite-Error. Three
different interrupt-outputs exist for the following events: Transmit-Ready, Receive-Ready and Error-
Detected.
The transmit and receive registers are double buffered, so that during the reception of the first byte
the second byte can be received, as well as the transmission can run continuously.
Data Sequence
The data words consists of:
– 1 start bit (= ‘0’)
– in mode
I : 8 data bits
in mode
II : 8 data bits, 1 parity bit
in mode III : 8 data bits, 1 address bit
– 1 stop bit (= ‘1’)
During idle state the output is held at ‘1’..
The transfer of the data bits starts with the least significant bit (LSB).
Mode
I : no bit
Mode
II : 1 parity bit
Mode
III : 1 address bit
Start
Stop
Operating Modes
The three possible modes are switched with bits SM0 and SM1 of the register SACON0 as shown
in table below.
Idle
0
1
2
3
4
5
6
7
8
Idle
SM0
SM1
Mode
Description
0
I
8-bit data
0
1
II
8-bit data,
1 parity bit
1
0
III
8-bit data,
1 address bit
1
IV
reserved
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