- 您现在的位置：买卖IC网 > PDF目录98079 > SDA20C440 (SIEMENS A G) 8-BIT, MROM, MICROCONTROLLER, PQFP80 PDF资料下载
参数资料
| 型号： | SDA20C440 |
| 厂商： | SIEMENS A G |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PQFP80 |
| 封装： | PLASTIC, MQFP-80 |
| 文件页数： | 5/55页 |
| 文件大小： | 990K |
| 代理商： | SDA20C440 |
第1页第2页第3页第4页当前第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页
SDA 20C440
Semiconductor Group
13
Memory Map
2
Functional Description
2.1
Architecture
The controller uses the Siemens ECO-51 processor core. This core is opcode compatible to the
8051 microcontroller series. Because of a different internal timing, the instruction times differ from
the original 8051 behavior.
For detailed information see chapter ‘Instruction Set’.
2.1.1
CPU Hardware
Program Memory
The controller addresses 4 Kbyte of internal mask programmable ROM.
Program Status Word Register (PSW)
The PSW-flags record processor status information and controls the operation of the processor.
The carry (CY), auxiliary carry (AC), two user flags (F0 and F1), register bank select (RS0 and RS1),
overflow (OV) and parity (P) flags reside in the Program Status Word Register. These flags are bit-
memory-mapped within the byte-memory-mapped PSW. The CY-, AC-, and OV-flags generally
reflect the status of the latest arithmetic operations. The CY-flag is also the Boolean accumulator for
bit operations. The P-flag always reflects the parity of the A-register. F0 and F1 are general purpose
flags which are pushed onto the stack as part of a PSW-save. The two register bank select bits (RS1
and RS0) determine which one of the four register banks is selected as follows:
Stack Pointer (SP)
The 8-bit stack pointer contains the address at which the last byte was pushed onto the stack. This
is also the address of the next byte that will be popped. The SP is incremented during a push. SP
can be read from or written to under software control. The stack may be located anywhere within the
internal data RAM-address space and may be as large as 128 bytes.
RS1
RS0
Register
Bank
Register
Location
00
0
00H – 07H
01
1
08H – 0FH
10
2
10H – 17H
11
3
18H – 1FH
MSB
SFR-Address: D0H
LSB
PSW: Program Status Word
CY
AC
F0
RS1
RS0
OV
F1
P
Figure 1
相关PDF资料 |
PDF描述 |
|---|---|
| SDA20C840 | 8-BIT, MROM, 4.5 MHz, MICROCONTROLLER, PQFP80 |
| SDC2200DUT3D | 1500 MHz, MICROPROCESSOR, CPGA453 |
| SDC2800DUT3D | 2000 MHz, MICROPROCESSOR, CPGA453 |
| SED1200F0B | 16 X 50 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80 |
| SED1210F0A | 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SDA2101 | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:FREQUENCY DIVIDER 1:64 |
| SDA2112-2 | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:TV PLL FOR 125KHZ RESOLUTION |
| SDA2120 | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:120 MHz PLL for AM/FM Receivers |
| SDA2121-2 | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:PLL WITH I2C BUS FOR AM/FM RECEIVERS |
| SDA2121-2X | 制造商:INFINEON 制造商全称:Infineon Technologies AG 功能描述:PLL WITH I2C BUS FOR AM/FM RECEIVERS |
发布紧急采购，3分钟左右您将得到回复。