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参数资料
| 型号： | SDA20C440 |
| 厂商： | SIEMENS A G |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PQFP80 |
| 封装： | PLASTIC, MQFP-80 |
| 文件页数： | 17/55页 |
| 文件大小： | 990K |
| 代理商： | SDA20C440 |
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SDA 20C440
Semiconductor Group
24
Security of Data
Following errors are detected by the SART-module:
– Framing Error
A logical ‘0’ is received instead of the expected stopbit (logic ‘1’). A framing-error sets
error flag FE.
– Parity Error
The value of the received parity bit is not equal to the parity of the according data byte.
Even parity is assumed. A parity error sets error flag PE.
– Overwrite Error
The databyte in the register RXBUF is overwritten by a new databyte before the first
databyte was read by the CPU. An overwrite error sets error flag OE.
The occurrence of one of these errors is signaled to the CPU using the control interrupt CNTRINT.
The evaluation of the error flags identifies the appropriate cause. The release of the control interrupt
CNTRINT can be suppressed for each fault individually by setting the appropriate mask bit to 0
(MFE, MPE and MOE).
Figure 3
Block Diagram of the Baudrate Generator
BR
SASCAL
/16
3
/8
2
/4
1
/2
0
8 -Bit Reload Counter
V
8 -Bit Reload Register
External
Reference
Frequency
SABAUD
MSB
LSB
Prescaler
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