161
9.3.8
Relationship between Request Modes and Bus Modes by DMA Transfer Category
Table 9.6 shows the relationship between request modes and bus modes by DMA transfer
category.
Table 9.6
Relationship of Request Modes and Bus Modes by DMA Transfer Category
Address
Mode
Transfer Category
Request
Mode
Bus*
5
Mode
Transfer
Size (Bits)
Usable
Channels
Single
External device with DACK and
external memory
External
B/C
8/16/32
0,1
External device with DACK and
memory-mapped external device
External
B/C
8/16/32
0, 1
Dual
External memory and external memory
Any*
1
B/C
8/16/32
0, 1
External memory and memory-mapped
external device
Any*
1
B/C
8/16/32
0, 1
Memory-mapped external device and
memory-mapped external device
Any*
1
B/C
8/16/32
0, 1
External memory and on-chip memory
Any*
1
B/C
8/16/32
0, 1
External memory and on-chip
peripheral module
Any*
2
B/C*
3
8/16/32*
4
0, 1
Memory-mapped external device and
on-chip memory
Any*
1
B/C
8/16/32
0, 1
Memory-mapped external device and
on-chip peripheral module
Any*
2
B/C*
3
8/16/32*
4
0, 1
On-chip memory and on-chip memory
Any*
1
B/C
8/16/32
0, 1
On-chip memory and on-chip
peripheral module
Any*
2
B/C*
3
8/16/32*
4
0, 1*
1
On-chip peripheral module and on-
chip peripheral module
Any*
2
B/C*
3
8/16/32*
4
0, 1
Notes: 1. External request, auto-request or on-chip peripheral module request enabled. However,
in the case of on-chip peripheral module request, it is not possible to specify the SCI or
A/D converter for the transfer request source.
2. External request, auto-request or on-chip peripheral module request possible. However,
if transfer request source is also the SCI or A/D converter, the transfer source or
transfer destination must be the SCI or A/D converter.
3. When the transfer request source is the SCI, only cycle steal mode is possible.
4. Access size permitted by register of on-chip peripheral module that is the transfer
source or transfer destination.
5. B: Burst, C: Cycle steal