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| 型号： | SI3056-D-FS |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 78/94页 |
| 文件大小： | 0K |
| 描述： | IC SYSTEM-SIDE DAA 16SOIC |
| 标准包装： | 48 |
| 数据格式： | V.92 |
| 电源电压： | 3 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC N |
| 包装： | 管件 |
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Si3056
Si3018/19/10
8
Rev. 1.05
Table 4. AC Characteristics
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Sample Rate1
Fs
Fs = FPLL2/5120
7.2
—
16
kHz
PLL Output Clock Frequency1
FPLL1
FPLL1 =(FMCLK x M)/N
—
98.304
—
MHz
Transmit Frequency Response
Low –3 dBFS Corner
—
0
—
Hz
Receive Frequency Response
Low –3 dBFS Corner,
FILT = 0
—5
—
Hz
Receive Frequency Response
Low –3 dBFS Corner,
FILT = 111
—200
—
Hz
Transmit Full Scale Level2,3
VFS
FULL = 0 (0 dBm)
—
1.1
—
VPEAK
FULL = 111(3.2 dBm)
—
1.58
—
VPEAK
FULL2 = 1 (6.0 dBm)
—
2.16
—
VPEAK
Receive Full Scale Level2,4
VFS
FULL = 0 (0 dBm)
1.1
VPEAK
FULL = 111(3.2 dBm)
—
1.58
—
VPEAK
FULL2 = 1 (6.0 dBm)
—
2.16
—
VPEAK
Dynamic Range5,6,7
DR
ILIM = 0, DCV = 11, DCR = 0,
IL = 100 mA, MINI = 00
—80
—
dB
Dynamic Range5,6,7
DR
ILIM = 0, DCV = 00, DCR = 0,
IL =20 mA, MINI =11
—80
—
dB
Dynamic Range5,6,7
DR
ILIM = 1, DCV = 11, DCR = 0,
IL =50mA, MINI = 00
—80
—
dB
Transmit Total Harmonic
THD
ILIM = 0, DCV = 11, DCR = 0,
IL = 100 mA, MINI = 00
—–72
—
dB
Transmit Total Harmonic
THD
ILIM = 0, DCV = 00, DCR = 0,
IL =20 mA, MINI =11
—–78
—
dB
Notes:
1. See Figure 26 on page 37.
2. Measured at TIP and RING with 600
termination at 1 kHz, as shown in Figure 1.
3. With FULL = 1, the transmit and receive full scale level of +3.2 dBm can be achieved with a 600
ac termination, while
the transmit and receive level in dBm varies with reference impedance, the DAA will transmit and receive 1 dBV into all
reference impedances in “FULL” mode. With FULL2 = 1, the transmit and receive full scale level of +6.0 dBm can be
achieved with a 600
ac termination. In “FULL2” mode, the DAA will transmit and receive +1.5 dBV into all reference
impedances.
4. Receive full scale level produces –0.9 dBFS at SDO.
5. DR = 20 x log (RMS VFS/RMS VIN).+ 20 x log (RMS VIN/RMS noise). The RMS noise measurement excludes
harmonics. VFS is the 0 dBm full-scale level.
6. Measurement is 300 to 3400 Hz. Applies to both transmit and receive paths. VIN = 1 kHz, –3 dBFS, Fs = 10300 Hz.
7. When using the Si3010 line-side, the typical DR values will be approximately 10 dB lower.
8. THD = 20 x log (RMS distortion/RMS signal). VIN = 1 kHz, –3 dBFS, Fs = 10300 Hz.
9. When using the Si3010 line-side, the typical THD values will be approximately 10 dB higher.
10. DRCID = 20 x log (RMS VCID/RMS VIN) + 20 x log(RMS VIN/RMS noise). VCID is the 6 V full-scale level for the typical
application circuit in Figure 17. With the enhanced CID circuit, the VCID full-scale level is 1.5 V peak, and DRCID
increases to 62 dB.
11. Available on the Si3019 line-side device only.
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| SI3056-D-ZS3R | 制造商:Silicon Laboratories Inc 功能描述:MODEM CHIP CHIPSET 56KBPS - Tape and Reel |
| SI3056-F-FS | 制造商:Silicon Laboratories Inc 功能描述: |
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