参数资料
型号: SI3402ISO-EVB
厂商: Silicon Laboratories Inc
文件页数: 10/22页
文件大小: 0K
描述: BOARD EVAL POE ISOL FOR SI3402
标准包装: 1
主要目的: 特殊用途 DC/DC,以太网供电(POE)
输出及类型: 1,隔离
输出电压: 5V
输入电压: 44 ~ 57 V
稳压器拓扑结构: 回扫
频率 - 开关: 350kHz
板类型: 完全填充
已供物品: 板,CD
已用 IC / 零件: Si3402
其它名称: 336-1828
Si3402
3. Functional Description
The Si3402 consists of two major functions: a hotswap
controller/interface and a complete pulse-width-
modulated switching regulator (controller and power
FET).
3.1. Overview
The hotswap interface of the Si3402 provides the
complete front end of an 802.3-compliant PD. The
Si3402 also includes two full diode bridges, a transient
voltage surge suppressor, detection circuit,
classification current source, and dual-level hotswap
current limiting switch. This high level of integration
enables direct connection to the RJ-45 connector,
simplifies system design, and provides significant
advantages for reliability and protection. The Si3402
requires only four standard external components
(detection resistor, optional classification resistor, load
capacitor, and input capacitor) to create a fully 802.3-
compliant interface. For more information about
supporting higher-power applications, see “AN313:
Using the Si3402 in High Power Applications” and
“AN314: Power Combining Circuit for PoE for up to
18.5 W Output”.
The Si3402 integrates a complete pulse-width
modulated switching regulator that includes the
controller and power FET. The switching regulator
utilizes a constant frequency pulse-width modulated
controller optimized for all possible load conditions in
PoE applications. The regulator integrates a low on-
resistance (Ron) switching power MOSFET that
minimizes power dissipation, increases overall regulator
efficiency, and simplifies system design. An integrated
error amplifier, precision reference, and programmable
soft-start current source provide the flexibility of using a
non-isolated buck regulator topology or an isolated
flyback regulator topology.
The Si3402 is designed to operate with both 802.3-
compliant Power Sourcing Equipment (PSE) and pre-
standard (legacy) PSEs that do not adhere to the 802.3
specified inrush current limits. The Si3402 is compatible
with compliant and legacy PSEs because it uses two
levels for the hotswap current limits. By setting the initial
inrush current limit to a low level, a PD based on the
Si3402 minimizes the current drawn from either a
compliant or legacy PSE during startup. After powering
up, the Si3402 automatically switches to a higher-level
current limit, thereby allowing the PD to consume up to
12.95 W (the max power allowed by the 802.3
specification).
The inrush current limit specified by the 802.3 standard
can generate high transient power dissipation in the PD.
By properly sizing the devices and implementing on-
chip thermal protection, the Si3402 can go through
multiple turn-on sequences without overheating the
package or damaging the device. The switching
regulator power MOSFET has been conservatively
designed and sized to withstand the high peak currents
created when converting a high-voltage, low-current
supply into a low-voltage, high-current supply.
Excessive power cycling or short circuit faults will
engage the thermal overload protection to prevent the
onboard power MOSFETs from exceeding their safe
and reliable operating ranges.
3.2. PD Hotswap Controller
The Si3402 hotswap controller changes its mode of
operation based on the input voltage applied to the CT1
and CT2 pins or the SP1 and SP2 pins, the 802.3-
defined modes of operation, and internal controller
requirements. Table 9 defines the modes of operation
for the hotswap interface.
PLOSS
VPOSF VPOSS
RDET
ISOSSFT
SSFT
POWER LOSS
DETECTOR
0V
DETECTION
CONTROL
ON
CENTRAL BIAS
BANDGAP REF
10 V
5V
1.23 V
SWITCHER
STARTUP & BIAS
IABS
ITC
VREF
DIODE BRIDGES
12 V
OFF
CT2/SP2
AND PROTECTION
HOTSWAP
CONTROL
CLASSIFICATION
CONTROL
CURRENT
ON
OFF
39 V
32 V
CT1/SP1
12 V
22 V
ON
OFF
LIMIT
HI/LO
HSO
VNEG
RCL
Figure 3. Hotswap Block Diagram
10
Rev. 1.31
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