参数资料
型号: SI6924AEDQ-T1-GE3
厂商: Vishay Siliconix
文件页数: 8/12页
文件大小: 0K
描述: MOSFET N-CH 28V ESD 8-TSSOP
标准包装: 1
FET 型: 2 个 N 沟道(双)
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 28V
电流 - 连续漏极(Id) @ 25° C: 4.1A
开态Rds(最大)@ Id, Vgs @ 25° C: 33 毫欧 @ 4.6A,4.5V
Id 时的 Vgs(th)(最大): 1.5V @ 250µA
闸电荷(Qg) @ Vgs: 10nC @ 4.5V
功率 - 最大: 1W
安装类型: 表面贴装
封装/外壳: 8-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-TSSOP
包装: 标准包装
其它名称: SI6924AEDQ-T1-GE3DKR
AN1001
Vishay Siliconix
LITTLE FOOT R TSSOP-8
The Next Step in Surface-Mount Power MOSFETs
Wharton McDaniel and David Oldham
When Vishay Siliconix introduced its LITTLE FOOT
MOSFETs, it was the first time that power MOSFETs had been
offered in a true surface-mount package, the SOIC. LITTLE
FOOT immediately found a home in new small form factor disk
drives, computers, and cellular phones.
The new LITTLE FOOT TSSOP-8 power MOSFETs are the
natural evolutionary response to the continuing demands of
many markets for smaller and smaller packages. LITTLE
FOOT TSSOP-8 MOSFETs have a smaller footprint and a
lower profile than LITTLE FOOT SOICs, while maintaining low
r DS(on) and high thermal performance. Vishay Siliconix has
accomplished this by putting one or two high-density MOSFET
die in a standard 8-pin TSSOP package mounted on a custom
leadframe.
THE TSSOP-8 PACKAGE
This is the low profile demanded by applications such as
PCMCIA cards.
It reduces the power package to the same height as many
resistors and capacitors in 0805 and 0605 sizes. It also allows
placement on the “passive” side of the PC board.
The standard pinouts of the LITTLE FOOT TSSOP-8
packages have been changed from the standard established
by LITTLE FOOT. This change minimizes the contribution of
interconnection resistance to r DS(on) and maximizes the
transfer of heat out of the package.
Figure 2 shows the pinouts for a single-die TSSOP. Notice that
both sides of the package have Source and Drain
connections, whereas LITTLE FOOT has the Source and Gate
connections on one side of the package, and the Drain
connections are on the opposite side.
LITTLE FOOT TSSOP-8 power MOSFETs require
approximately half the PC board area of an equivalent LITTLE
FOOT device (Figure 1). In addition to the reduction in board
area, the package height has been reduced to 1.1 mm.
Drain
Source
Source
Gate
Figure 2.
Pinouts for Single Die TSSOP
Drain
Source
Source
Drain
Top View
Figure 3 shows the standard pinouts for a dual-die TSSOP-8.
In this case, the connections for each individual MOSFET
occupy one side.
Drain 1
Drain 2
Side View
Source 1
Source 1
Gate 1
Source 2
Source 2
Gate 2
Figure 1.
An TSSOP-8 Package Next to a SOIC-8 Package
with Views from Both Top and Side
Figure 3.
Pinouts for Dual-Die TSSOP
Document Number: 70571
12-Dec-03
www.vishay.com
1
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