参数资料
| 型号： | SIC413CB-T1-E3 |
| 厂商： | Vishay Siliconix |
| 文件页数： | 9/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 8SOIC |
| 标准包装： | 1 |
| 系列： | microBUCK® |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 13.2 V |
| 输入电压： | 4.75 V ~ 26 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 500kHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -25°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC |
| 其它名称： | SIC413CB-T1-E3DKR |
SiC413
Vishay Siliconix
APPLICATION NOTES
Inductor Selection
It is common practice to rate for the worst-case RMS ripple
that occurs when the duty cycle is at 50 %:
The inductor is one of the energy storage components in
a converter. Choosing an inductor means specifying its
size, structure, material, inductance, saturation level,
DC-resistance (DCR), and core loss. Fortunately, there are
I RMS =
I O .MAX.
2
many inductor vendors that offer wide selections with ample
specifications and test data, such as Vishay Dale.
The following are some key parameters that users should
focus on. In PWM mode, inductance has a direct impact on
the ripple current. Assuming 100 % efficiency, the steady
state peak-to-peak inductor (L) ripple current (I PP ) can be
calculated as
Output Capacitor Selection
The output capacitor affects output voltage ripple due to
2 reasons: the capacitance and the effective series
resistance (ESR). The selection of the output capacitor is
primarily determined by the capacitor ESR required
minimizing voltage ripple and current ripple. The relationship
between output ripple Δ V O , capacitance C O and its ESR is:
(
I PP =
V O . ( V I N - V O )
V I N . L . f
Δ V O = I PP . ESR +
1
8 . f . C O
)
where f = switching frequency.
Higher inductance means lower ripple current, lower rms
current, lower voltage ripple on both input and output, and
higher efficiency, unless the resistive loss of the inductor
dominates the overall conduction loss. However, higher
inductance also means a bigger inductor size and a slower
response to transients. For fixed line and load conditions,
higher inductance results in a lower peak current for each
pulse, a lower load capability, and a higher switching
frequency. The saturation level is another important
parameter in choosing inductors. Note that the saturation
levels specified in data sheets are maximum currents. For a
dc-to-dc converter operating in PWM mode, it is the
maximum peak inductor (I PK ) current that is relevant, and
can be calculated using these equations:
Multiple capacitors placed in parallel may be needed to meet
the ESR requirements. However if the ESR is too low it may
cause stability problems.
Control Loop Design
The SiC413CB is an integrated voltage mode buck
converter. The loop stability depends on input and output
voltage, output LC filter, the equivalent lumped capacitance,
resistance and inductance attached to the output voltage rail
beyond the LC filter. The output LC filter creates a two pole
roll-off of the loop gain that makes the closed loop system
inherently unstable. Therefore, a compensation network of
poles and zeros must be implemented to achieve
unconditional stability.
Figure 4 shows a simplified diagram of the SiC413CB buck
converter control loop and the external elements that affect
I PK = I O +
I PP
2
loop gain, phase shift and stability. In this diagram L1, C4
and C5 and R6 form a first order model of low pass filter.
Resistor R6 represents the effective series resistance (ESR)
where I O = output current.
This peak current varies with inductance tolerance and other
errors, and the rated saturation level varies over
temperature. So a sufficient design margin is required when
choosing current ratings. A high-frequency core material,
such as ferrite, should be chosen, the core loss could lead to
serious efficiency penalties. The DCR should be kept as low
as possible to reduce conduction losses.
Input Capacitor Selection
To minimize input voltage ripple caused by the step-down
conversion, and interference of large voltage spikes from
other circuits, a low-ESR input capacitor is required to filter
the input voltage. The input capacitor should be rated for the
maximum RMS input current of:
of C5, which is often the case of a polymer (tantalum)
capacitor. Ceramic (MLCC) capacitors are also used as
denoted by C4, which has near zero ESR. To balance the
performance and cost, the recommended output capacitor
configuration is a combination of low cost, high capacitance
polymer capacitors (C5) with ESR (R6) to add a zero to help
boost phase margin and MLCC capacitors (C4) that have low
ESR for achieving low voltage ripple. In practice, the lumped
equivalent capacitance at the output of the filter may be a
combination of many different kinds of capacitors. The
characteristics of these capacitors must be considered when
deriving the open loop transfer function and designing the
loop compensation. It is important to have a good
approximation of the lumped impedance (capacitors,
resistors, ferrite beads, π filters, etc.) tied to the rail before
calculating compensation network component values.
Resistor R1 and R2 form the feedback voltage divider that
( )
I RMS = I O.MAX
V O
V I N
1 -
V O
V I N
samples the DC output and applies a feedback signal to the
FB pin. Components C1, C2, C3, R4, R5 and the
transconductance error amplifier form the loop
compensation network. With voltage mode control loop the
Document Number: 69057
S09-2250-Rev. D, 26-Oct-09
www.vishay.com
9
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相关代理商/技术参数 |
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| SIC413DB | 功能描述:电源管理IC开发工具 SIC413 Demo Board RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| SIC414 | 制造商:VISHAY 制造商全称:Vishay Siliconix 功能描述:microBUCK SiC414 6 A, 28 V Integrated Buck Regulator with 5 V LDO |
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