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参数资料
| 型号： | SN65LVDS305ZQE |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER |
| 中文描述： | 可编程27位显示器串行接口变送器 |
| 文件页数： | 12/25页 |
| 文件大小： | 586K |
| 代理商： | SN65LVDS305ZQE |
www.ti.com
SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PLL FREQUENCY MHz
4.0%
5.0%
6.0%
7.0%
8.0%
9.0%
10.0%
11.0%
12.0%
0
100
200
300
400
500
600
700
P
9%
8.5%
7%
7.5%
RX PLL BW
TX PLL BW
0
10
15
5
20
PCLK FREQUENCY – MHz
P
6.0
6.5
7.0
7.5
8.0
8.5
9.0
4 MHz:
8.5%
15 MHz:
7.6%
Spec Limit
SN65LVDS305
SLLS744–AUGUST 2006
PARAMETER
TEST CONDITIONS
MIN
TYP
(1)
MAX
UNIT
20%-to-80% differential
output signal rise time
t
r
See
Figure 7
and
Figure 8
250
500
ps
20%-to-80% differential
output signal fall time
t
f
See
Figure 7
and
Figure 8
250
500
PLL bandwidth (3-dB cutoff
frequency)
Tested from PCLK input to
CLK output, See
Figure 5
(2)
f
BW
f
PCLK
= 15 MHz
0.076 f
PCLK
MHz
Propagation delay time,
input to serial output (data
latency
Figure 9
)
t
pd(L)
TXEN at V
DD
, V
IH
=V
DD
, V
IL
=GND, R
L
=100
0.8/f
PCLK
1/f
PCLK
1.2/f
PCLK
s
t
H
×
f
CLK0
Output CLK duty cycle
0.45
0.5
0.55
TXEN glitch suppression
pulse width
(3)
V
IH
=V
, V
=GND, TXEN toggles between V
IL
and V
IH
,
see
Figure 12
and
Figure 13
t
GS
3.8
10
μ
s
Enable time from power
down (
↑
TXEN)
Time from TXEN pulled high to CLK and D outputs
enabled and transmit valid data; see
Figure 13
t
pwrup
0.24
2
ms
TXEN is pulled low during transmit mode; time
measurement until output is disabled and PLL is shut
down; see
Figure 13
Disable time from active
mode (
↓
TXEN)
t
pwrdn
0.5
11
μ
s
TXEN at V
; device in standby; time measurement from
PCLK starts switching to CLK and D outputs enabled and
transmit valid data; see
Figure 13
Enable time from standby
(
PCLK)
t
wakup
0.23
2
ms
TXEN at V
; device is transmitting; time measurement
from PCLK input signal stops until CLK + D outputs are
disabled and PLL is disabled; see
Figure 13
Disable time from active
mode (PCLK stopping)
t
sleep
0.4
100
μ
s
(1)
(2)
All typical values are at 25
°
C and with 1.8-V supply unless otherwise noted.
The maximum limit is based on statistical analysis of the device performance over process, voltage, and temperature ranges. This
parameter is functionality tested only on automatic test equipment (ATE).
The TXEN input incorporates glitch-suppression circuitry to disregard short input pulses. t
GS
is the duration of either a high-to-low or
low-to-high transition that is suppressed.
(3)
Figure 5. SN65LVDS305 PLL Bandwidth (Also Showing the SN65LVDS306 PLL Bandwidth)
12
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN65LVDS305ZQER | 功能描述:串行器/解串器 - Serdes QVGAVGA 27B Display Ser Interface RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS306ZQER | 功能描述:串行器/解串器 - Serdes QVGAVGA 27B Display Ser Interface RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS307ZQCR | 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS307ZQCT | 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS308ZQCR | 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
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