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参数资料
| 型号： | SN65LVDS305ZQE |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER |
| 中文描述： | 可编程27位显示器串行接口变送器 |
| 文件页数： | 8/25页 |
| 文件大小： | 586K |
| 代理商： | SN65LVDS305ZQE |
www.ti.com
Parity Bit Generation
The SN65LVDS305 transmitter calculates the parity of the transmit data word and sets the parity bit accordingly.
The parity bit covers the 27-bit data payload consisting of 24 bits of pixel data plus VS, HS, and DE. The two
reserved bits are not included in the parity generation. Odd-parity bit signaling is used. The transmitter sets the
parity bit if the sum of the 27 data bits result in an even number of ones. The parity bit is cleared otherwise. This
allows the receiver to verify parity and detect single bit errors.
Status Detect and Operating Modes Flow diagram
The SN65LVDS305 switches between the power saving and active modes in the following way:
Standby
Mode
Transmit
Mode
Acquire
Mode
TXEN High > 10 s
m
Power Up
TXEN = 0
Power Up
TXEN = 1
CLK Active
PLLAchieved Lock
Shutdown
Mode
TXEN Low
> 10 s
m
TXEN Low
> 10 s
m
TXEN Low
> 10 s
m
PCLK
Stops or Lost
PCLK
Stops or Lost
PCLK
Active
Power Up
TXEN = 1
CLK Inactive
SN65LVDS305
SLLS744–AUGUST 2006
FUNCTIONAL DESCRIPTION (continued)
Figure 4. Status Detect and Operating Modes Flow Diagram
Table 2. Status Detect and Operating Modes Descriptions
Mode
Characteristics
Conditions
Shutdown mode
Least amount of power consumption
(1)
(most circuitry turned
off); all outputs are high-impedance.
Low power consumption (only clock activity circuit active; PLL TXEN is high; PCLK input signal is missing or
is disabled to conserve power); all outputs are
high-impedance.
PLL tries to achieve lock; all outputs are high-impedance.
TXEN is low.
(1)(2)
Standby mode
inactive.
(2)
Acquire mode
TXEN is high; PCLK input monitor detected input
activity.
TXEN is high and PLL is locked to incoming clock.
Transmit mode
Data transfer (normal operation); Transmitter serializes data
and transmits data on serial output.
(1)
In shutdown mode, all SN65LVDS305 internal switching circuits (e.g., PLL, serializer, etc.) are turned off to minimize power
consumption. The input stage of any input terminal remains active.
Leaving inputs unconnected can cause random noise to toggle the input stage and potentially harm the device. All inputs must be tied to
a valid logic level, V
IL
or V
IH
, during shutdown or standby mode.
(2)
8
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN65LVDS305ZQER | 功能描述:串行器/解串器 - Serdes QVGAVGA 27B Display Ser Interface RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS306ZQER | 功能描述:串行器/解串器 - Serdes QVGAVGA 27B Display Ser Interface RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS307ZQCR | 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS307ZQCT | 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
| SN65LVDS308ZQCR | 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 类型:Deserializer 数据速率:1.485 Gbit/s 输入类型:ECL/LVDS 输出类型:LVCMOS 输入端数量:1 输出端数量:20 工作电源电压:2.375 V to 2.625 V 工作温度范围:0 C to + 70 C 封装 / 箱体:TQFP-64 |
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