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| 型号： | SNJ54LVT8986HV |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V LINKING ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS |
| 中文描述： | 3.3 V的连接寻址扫描港口多点寻址IEEE标准1149.1（JTAG接口）技术咨询收发器 |
| 文件页数： | 44/51页 |
| 文件大小： | 880K |
| 代理商： | SNJ54LVT8986HV |
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SN54LVT8986, SN74LVT8986
3.3-V LINKING ADDRESSABLE SCAN PORTS
MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SCBS759B
–
OCTOBER 2002
–
REVISED APRIL 2003
44
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
SN54LVT8986
MIN
TYP
SN74LVT8986
MIN
TYP
UNIT
MAX
MAX
ICC
VCC = 3 V to 3.6 V,
One input at VCC
–
0.6 V,
Other inputs at VCC or GND
VI = 3 V or 0
VO = 3 V or 0
0.2
0.2
mA
Ci
Co
7.5
7.5
pF
8.5
8.5
pF
All typical values are at VCC = 3.3 V, TA = 25
°
C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 24)
SN54LVT8986
MIN
SN74LVT8986
MIN
UNIT
MAX
MAX
fclock1
fclock2
Clock frequency, LASP not cascaded
PTCK
40
40
MHz
Clock frequency, LASP cascaded
33
33
t1
tw1
Pulse duration LASP not cascaded
Pulse duration, LASP not cascaded
PTCK high
15
15
PTCK low
10
10
t2
tw2
Pulse duration LASP cascaded
Pulse duration, LASP cascaded
PTCK high
15
15
ns
PTCK low
15
15
tw3
Pulse duration
PTRST low
A9
–
A0 and P2
–
P0 before PTCK
↓
§
STDI0
–
STDI2, PTDI before PTCK
↑
CTDI before PTCK
↑
PTMS before PTCK
↑
BYP5 before PTCK
↑
BYP4, BYP2
–
BYP0 before PTCK
↓
A9
–
A0 and P2
–
P0 after PTCK
↓
§
CTDI, STDI0
–
STDI2, PTDI after
PTCK
↑
PTMS after PTCK
↑
BYP5 after PTCK
↑
BYP4, BYP2
–
BYP0 after PTCK
↓
9
9
10.2
8
10.1
10
tsu
Setup time
2
2
ns
10
10
8
8
4
4
th
Hold time
4
4
ns
4
4
4
4
4
4
§
These requirements apply only in the case in which the address inputs are changed during a linking shadow protocol. For normal application
of the LASP, it is recommended that the address and position inputs remain static throughout any shadow protocols. In such cases, the timing
of address and position inputs relative to PTCK need not be considered.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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