参数资料
型号: SPC560B50L3-ENG
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-100
文件页数: 50/113页
文件大小: 983K
代理商: SPC560B50L3-ENG
SPC560Bx, SPC560Cx
Electrical characteristics
Doc ID 14619 Rev 7
4.3
NVUSRO register
Portions of the device configuration, such as high voltage supply, oscillator margin, and
watchdog enable/disable after reset are controlled via bit values in the Non-Volatile User
Options Register (NVUSRO) register.
4.3.1
NVUSRO[PAD3V5V] field description
Table 6 shows how NVUSRO[PAD3V5V] controls the device configuration.
The DC electrical characteristics are dependent on the PAD3V5V bit value.
4.3.2
NVUSRO[OSCILLATOR_MARGIN] field description
Table 7 shows how NVUSRO[OSCILLATOR_MARGIN] controls the device configuration.
The fast external crystal oscillator consumption is dependent on the
OSCILLATOR_MARGIN bit value.
For a detailed description of the NVUSRO register, please refer to the SPC560Bx and
SPC560Cx Reference Manual.
4.4
Absolute maximum ratings
Table 6.
PAD3V5V field description(1)
1.
See the device reference manual for more information on the NVUSRO register.
Value(2)
2.
'1' is delivery value. It is part of shadow Flash, thus programmable by customer.
Description
0
High voltage supply is 5.0 V
1
High voltage supply is 3.3 V
Table 7.
OSCILLATOR_MARGIN field description(1)
1.
See the device reference manual for more information on the NVUSRO register.
Value(2)
2.
'1' is delivery value. It is part of shadow Flash, thus programmable by customer.
Description
0
Low consumption configuration (4 MHz/8 MHz)
1
High margin configuration (4 MHz/16 MHz)
Table 8.
Absolute maximum ratings
Symbol
Parameter
Conditions
Value
Unit
Min
Max
VSS
SR Digital ground on VSS_HV pins
0
V
VDD
SR
Voltage on VDD_HV pins with respect to ground
(VSS)
0.3
6.0
V
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