参数资料
型号: SPC560B50L3-ENG
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-100
文件页数: 98/113页
文件大小: 983K
代理商: SPC560B50L3-ENG
SPC
56
0
B
x
,SPC
56
0C
x
E
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ct
ric
al
ch
a
rac
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ris
tic
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ID
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7
85/113
TUEp
CC
P Total unadjusted error(7) for precise
channels, input only pins
Without current injection
2
0.6
2
LSB
T
With current injection
3
TUEx
CC
T Total unadjusted error(7) for extended
channel
Without current injection
3
1
3
LSB
T
With current injection
4
1.
VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified.
2.
Analog and digital VSS must be common (to be tied together externally).
3.
VAINx may exceed VSS_ADC and VDD_ADC limits, remaining on absolute maximum ratings, but the results of the conversion will be clamped respectively to
0x000 or 0x3FF.
4.
Duty cycle is ensured by using system clock without prescaling. When ADCLKSEL = 0, the duty cycle is ensured by internal divider by 2.
5.
During the sample time the input capacitance CS can be charged/discharged by the external source. The internal resistance of the analog source must
allow the capacitance to reach its final voltage level within tADC_S. After the end of the sample time tADC_S, changes of the analog input voltage have no
effect on the conversion result. Values for the sample clock tADC_S depend on programming.
6.
This parameter does not include the sample time tADC_S, but only the time for determining the digital result and the time to load the result’s register with the
conversion result.
7.
Total Unadjusted Error: The maximum error that occurs without adjusting Offset and Gain errors. This error is a combination of Offset, Gain and Integral
Linearity errors.
Table 41.
ADC conversion characteristics (continued)
Symbol
C
Parameter
Conditions(1)
Value
Unit
Min
Typ
Max
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