参数资料
型号: SST25VF064C-80-4C-Q2AE-T
厂商: Microchip Technology
文件页数: 14/37页
文件大小: 0K
描述: IC FLASH SER 64M DUAL I/O 8WSON
标准包装: 2,000
系列: SST25
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 64M(8M x 8)
速度: 80MHz
接口: SPI 串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-WSON
包装: 带卷 (TR)
64 Mbit SPI Serial Dual I/O Flash
A Microchip Technology Company
SST25VF064C
Data Sheet
Fast-Read Dual-Output (75 MHz)
The Fast-Read Dual-Output (3BH) instruction outputs data up to 75 MHz from the SIO 0 and SIO 1 pins.
To initiate the instruction, execute an 8-bit command (3BH) followed by address bits A23-A0 and a
dummy byte on SI/SIO 0 . Following a dummy cycle, the Fast-Read Dual-Output instruction outputs the
data starting from the specified address location on the SIO 1 and SIO 0 lines. SIO 1 outputs, per clock
sequence, odd data bits D7, D5, D3, and D1; and SIO 0 outputs even data bits D6, D4, D2, and D0.
CE# must remain active low for the duration of the Fast-Read Dual-Output instruction cycle. See Fig-
ure 8 for the Fast-Read Dual-Output sequence.
The data output stream is continuous through all addresses until terminated by a low-to-high transition
on CE#. The internal address pointer will automatically increment until the highest memory address is
reached. Once the highest memory address is reached, the address pointer automatically increments
to the beginning (wraparound) of the address space. for 64 Mbit density, once the data from address
location 7FFFFFH has been read the next output will be from address location 000000H.
CE#
SCK
MODE 3
MODE 0
0 1 2 3 4 5 6 7 8
15 16
28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
24-Bit Address
Dummy Cycle
IO, Switches from Input to Output
SIO0
3B
ADD.
ADD.
ADD.
X
6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
DOUT
DOUT
DOUT
DOUT
SIO1
HIGH IMPEDANCE
7 5 3 1
MSB
N
7 5 3 1
MSB
N+1
7 5 3 1
MSB
N+2
7 5 3 1
MSB
N+3
1392 F08.1
Figure 8: Fast-Read Dual Output Sequence
?2011 Silicon Storage Technology, Inc.
14
DS25036A
06/11
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