- 您现在的位置：买卖IC网 > PDF目录4227 > SST25VF064C-80-4C-Q2AE-T (Microchip Technology)IC FLASH SER 64M DUAL I/O 8WSON PDF资料下载
参数资料
| 型号： | SST25VF064C-80-4C-Q2AE-T |
| 厂商： | Microchip Technology |
| 文件页数： | 17/37页 |
| 文件大小： | 0K |
| 描述： | IC FLASH SER 64M DUAL I/O 8WSON |
| 标准包装： | 2,000 |
| 系列： | SST25 |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | FLASH |
| 存储容量： | 64M（8M x 8） |
| 速度： | 80MHz |
| 接口： | SPI 串行 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-WDFN 裸露焊盘 |
| 供应商设备封装： | 8-WSON |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页
64 Mbit SPI Serial Dual I/O Flash
A Microchip Technology Company
SST25VF064C
Data Sheet
Dual-Input Page-Program (50 MHz)
Dual-Input Page-Program instruction A2H, doubles the data input transfer of normal Page-Program
instruction and supports up to 50MHz. Data to be programmed is entered using two I/O pins, SIO 1 and
SIO 0 . Prior to the program operation the Write-Enable (WREN) instruction must be executed. The
Dual-Input Page-Program instruction is entered by driving CE# low, followed by the instruction code,
A2H, three address bytes, and at least one data byte on serial data inputs SIO 1 and SIO 0 pins. CE#
must be driven low for the entire duration of the sequence. The Dual-Input Page-Program instruction
programs up to 256 bytes of data in the memory. The selected page address must be in the erased
state (FFH) before initiating the Page-Program operation. A Dual-Input Page-Program applied to a pro-
tected memory area will be ignored.
CE# must be driven high after the seventh and eight bit of the last data byte has been latched; other-
wise, the dual input program instruction is not executed. Once CE# is driven high the instruction is exe-
cuted and the user may poll the WEL and Busy bit of the software status register or wait TPP for the
completion of the internal self-timed Page-Program operation. See Figure 10 for the Dual-Input-Page-
Program sequence.
For Dual-Input Page-Program, the memory range for the SST25VF064C is set in 256 byte page
boundaries. The device handles shifting of more than 256 bytes of data by keeping the last 256 bytes
of data shifted as the correct data to be programmed. If the target address for the Page-Program
instruction is not the beginning of the page boundary (A7-A0 are not all zero) and the number of data
input exceeds or overlaps the end of the address of the page boundary, the excess data inputs will
wrap around and will be programmed at the start of that target page.
CE#
SCK
MODE 3
MODE 0
0 1 2 3 4 5 6 7 8 9 10
28 29 30 31 32 33 34 35 36 37 28 39 40 41 42 43 44 45 46 47
24-bit Address (1)
SIO0
A2
23 22 21
3 2 1 0 6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
Data Byte 1 Data Byte 2
Data Byte 3
Data Byte 4
6 4 2 0
Data Byte 256
SIO1
High Impedance
7 5 3 1
MSB
7 5 3 1 7 5 3 1
MSB
MSB
7 5 3 1
MSB
7 5 3 1
MSB
1392 F31.0
Figure 11: Dual-Input Page-Program
?2011 Silicon Storage Technology, Inc.
17
DS25036A
06/11
相关PDF资料 |
PDF描述 |
|---|---|
| AMC10DTEH | CONN EDGECARD 20POS .100 EYELET |
| SST25VF064C-80-4C-Q2AE | IC FLASH SER 64M DUAL I/O 8WSON |
| ASC60DRTS | CONN EDGECARD 120PS .100 DIP SLD |
| SST25VF064C-80-4I-SCE-T | IC FLASH SER 64M DUAL I/O 16SOIC |
| XC2V1000-5FG456I | IC FPGA VIRTEX-II 456FGBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SST25VF064C-80-4C-Q2CE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
| SST25VF064C-80-4C-S3AE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
| SST25VF064C-80-4C-S3CE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
| SST25VF064C-80-4C-SAE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
| SST25VF064C-80-4C-SCE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:64 Mbit SPI Serial Dual I/O Flash |
发布紧急采购，3分钟左右您将得到回复。