参数资料
型号: SSTUB32864EC/G
厂商: NXP SEMICONDUCTORS
元件分类: 锁存器
英文描述: 32864 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96
封装: 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96
文件页数: 4/19页
文件大小: 113K
代理商: SSTUB32864EC/G
SSTUB32864_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 26 March 2007
12 of 19
NXP Semiconductors
SSTUB32864
1.8 V congurable registered buffer for DDR2-800 RDIMM applications
VID = 600 mV.
Vref = 0.5VDD.
VIH =Vref + 250 mV (AC voltage levels) for differential inputs. VIH =VDD for LVCMOS inputs.
VIL =Vref 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs.
Fig 9.
Voltage waveforms; set-up and hold times
tPLH and tPHL are the same as tPD.
Fig 10. Voltage waveforms; propagation delay times (clock to output)
tPLH and tPHL are the same as tPD.
VIH =Vref + 250 mV (AC voltage levels) for differential inputs. VIH =VDD for LVCMOS inputs.
VIL =Vref 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs.
Fig 11. Voltage waveforms; propagation delay times (reset to output)
tsu
VIH
VIL
VID
th
CK
input
Vref
VICR
002aaa374
VOH
VOL
output
tPLH
002aaa375
VT
VICR
tPHL
CK
Vi(p-p)
tPHL
002aaa376
LVCMOS
RESET
output
VT
0.5VDD
VIH
VIL
VOH
VOL
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SSTUB32866_10 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications