参数资料
型号: ST10F168-Q3
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP144
封装: 28 X 28 MM, PLASTIC, QFP-144
文件页数: 16/74页
文件大小: 479K
代理商: ST10F168-Q3
ST10F168
23/74
8 - INTERRUPT SYSTEM
The interrupt response time for internal program
execution is from 157ns to 375ns at 32MHz CPU
clock.
The ST10F168 architecture supports several
mechanisms for fast and flexible response to ser-
vice requests that can be generated from various
sources (internal or external) to the microcontrol-
ler. Any of these interrupt requests can be ser-
viced by the Interrupt Controller or by the
Peripheral Event Controller (PEC).
In contrast to a standard interrupt service where
the current program execution is suspended and
a branch to the interrupt vector table is performed,
just one cycle is ‘stolen’ from the current CPU
activity to perform a PEC service. A PEC service
implies a single Byte or Word data transfer
between any two memory locations with an
additional increment of either the PEC source or
the destination pointer. An individual PEC transfer
counter is implicitly decremented for each PEC
service except when performing in the continuous
transfer mode. When this counter reaches zero, a
standard
interrupt
is
performed
to
the
corresponding source related vector location.
PEC services are very well suited to perform the
transmission or the reception of blocks of data.
The ST10F168 has 8 PEC channels, each of
them offers such fast interrupt-driven data transfer
capabilities.
A interrupt control register which contains an
interrupt request flag, an interrupt enable flag and
an interrupt priority bitfield is dedicated to each
existing interrupt source. Thanks to its related
register, each source can be programmed to one
of sixteen interrupt priority levels. Once starting to
be processed by the CPU, an interrupt service
can only be interrupted by a higher prioritized
service
request. For
the standard interrupt
processing, each of the possible interrupt sources
has a dedicated vector location.
Fast external interrupt inputs are provided to ser-
vice external
interrupts
with
high
precision
requirements. These fast interrupt inputs feature
programmable edge detection (rising edge, falling
edge or both edges). Software interrupts are sup-
ported by means of the ‘TRAP’ instruction in com-
bination with an individual trap (interrupt) number.
Table 9 shows all the available ST10F168 inter-
rupt
sources
and
the
corresponding
hard-
ware-related
interrupt
flags,
vectors,
vector
locations and trap (interrupt) numbers:
Table 9 : Interrupt sources
Source of Interrupt or PEC Service Request
Request
Flag
Enable
Flag
Interrupt
Vector
Location
Trap
Number
CAPCOM Register 0
CC0IR
CC0IE
CC0INT
00’0040h
10h
CAPCOM Register 1
CC1IR
CC1IE
CC1INT
00’0044h
11h
CAPCOM Register 2
CC2IR
CC2IE
CC2INT
00’0048h
12h
CAPCOM Register 3
CC3IR
CC3IE
CC3INT
00’004Ch
13h
CAPCOM Register 4
CC4IR
CC4IE
CC4INT
00’0050h
14h
CAPCOM Register 5
CC5IR
CC5IE
CC5INT
00’0054h
15h
CAPCOM Register 6
CC6IR
CC6IE
CC6INT
00’0058h
16h
CAPCOM Register 7
CC7IR
CC7IE
CC7INT
00’005Ch
17h
CAPCOM Register 8
CC8IR
CC8IE
CC8INT
00’0060h
18h
CAPCOM Register 9
CC9IR
CC9IE
CC9INT
00’0064h
19h
CAPCOM Register 10
CC10IR
CC10IE
CC10INT
00’0068h
1Ah
CAPCOM Register 11
CC11IR
CC11IE
CC11INT
00’006Ch
1Bh
CAPCOM Register 12
CC12IR
CC12IE
CC12INT
00’0070h
1Ch
CAPCOM Register 13
CC13IR
CC13IE
CC13INT
00’0074h
1Dh
CAPCOM Register 14
CC14IR
CC14IE
CC14INT
00’0078h
1Eh
CAPCOM Register 15
CC15IR
CC15IE
CC15INT
00’007Ch
1Fh
CAPCOM Register 16
CC16IR
CC16IE
CC16INT
00’00C0h
30h
CAPCOM Register 17
CC17IR
CC17IE
CC17INT
00’00C4h
31h
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