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| 型号： | ST52T430K3B6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PDIP32 |
| 封装： | PLASTIC, SDIP-32 |
| 文件页数： | 18/85页 |
| 文件大小： | 1192K |
| 代理商： | ST52T430K3B6 |
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ST52T430/E430
25/85
4.2 Global Interrupt Request Enabling
When an Interrupt occurs, it generates a Global
Interrupt Pending (GIP), that can be masked by
software. After a GIP a Global Interrupt Request
(GIR) will be generated and Interrupt service
routine associated to the interrupt with higher
priority will start.
In order to avoid possible conflicts between
interrupt masking set in the main program, or
inside high level language compiler macros, the
GIP is hung up through the User Global Interrupt
Mask or the Macro Global Interrupt Mask (see
UEGI/UDGI instruction switches on/off the User
Global Interrupt Mask, enabling/disabling the GIR
for the main program.
MEGI/MDGI instructions switch the Macro Global
Interrupt Mask on/off, in order to ensure that the
macro will not be broken.
4.3 Interrupt Sources
ST52x430 manages interrupt signals generated by
the internal peripherals (PWM/Timers, UART and
Analog to Digital Converter) or coming from the
INT/PC0 pin. The External Interrupt can be
programmed to be active on the rising or falling
edge of INT/PC0 signal by setting the PEXTINT bit
of the Configuration Register to 0.
WARNING: Changing the interrupt priority inside
an interrupt service routine can cause unwanted
interrupt requests.
Each peripheral can be programmed in order to
generate the associated interrupt; further details
are described in the related chapter.
4.4 Interrupt Maskability
The interrupts can be masked by configuring the
REG_CONF 0 by means of LDCR, or LDCE,
instruction. The interrupt is enabled when the bit
associated to the mask interrupt is “1". Viceversa,
when the bit is ”0", the interrupt is masked and is
kept pendent.
For example:
LDRC 10,6 //load the constant 6 in the
RAM Register 10
LDCR 0, 10 // set the CONF_REG 0 with
the value stored in the RAM Register
10
the result is CONF_REG0 =00000110 enabling the
interrupts deriving from the ADC (INT_ADC) and
from the PWM/TIMER 0 (INT_PWM/TIMER0).
Reset Configuration ‘000000’
Table 4.1 Configuration Register 0
Description
Bit
Name
Value
Description
0MSKE
0
External Interrupt
Masked
1
External Interrupt
Not Masked
1
MSKAD
0
A/D Converter
Interrupt
Masked
1
A/D Converter
Interrupt
Not Masked
2
MSKTM0
0
PWM/TIMER
0Interrupt
Masked
1
PWM/TIMER 0
Interrupt
Not Masked
3
MSKTM1
0
PWM/TIMER 1
Interrupt
Masked
1
PWM/TIMER 1
Interrupt
Not Masked
4
MSKTM2
0
PWM/TIMER 2
Interrupt
Masked
1
PWM/TIMER 2
Interrupt
Not Masked
5MSCI
0
SCI Interrupt
Masked
1
SCI Interrupt Not
Masked
6PEXTINT
0
External Interrupt
Polarity
Active on Rising
1
External Interrupt
Polarity
Active on Falling
7
Not used
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST52T430K3M6 | 制造商:STMicroelectronics 功能描述: |
| ST52T430K3T6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer/PWMs, ADC, SCI |
| ST52T440 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG |
| ST52T440F0B6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG |
| ST52T440F0M6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT INTELLIGENT CONTROLLER UNIT ICU Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG |
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