参数资料
型号: ST92163N4G0
厂商: 意法半导体
英文描述: 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
中文描述: 16位产品全速USB微控制器16端点,20,000光盘和2K的RAM,I2C和脊髓损伤的复合设备,
文件页数: 136/224页
文件大小: 1372K
代理商: ST92163N4G0
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ST92163 - USB PERIPHERAL (USB)
USB INTERFACE (
Cont’d
)
8.3.3.1 DMA transfer
DMA descriptors for each endpoint, located in the
ST9 register file, indicate where the related mem-
ory buffer is located in RAM, how large the allocat-
ed bufferis and how many bytes must be transmit-
ted. Whena data transfer takes place, the USB-FS
buffering data loaded in an internal 8 byte long
FIFO buffer, and performing Burst-DMA transfers
as appropriate. Then, if needed, the proper hand-
shake answeris generated orexpected, according
to the direction of the transfer. At the end of the
transaction, an interrupt is generated: using status
registers and different interrupt vectors, the micro-
controller can determine which endpoint was
served, which type of transaction took place, if er-
rors occurred (bit stuffing, format, CRC, protocol,
missing ACK, over/underrun, etc...).
8.3.3.2 Structure and usage of DMA buffers
Each endpoint has two DMA buffers (onefor trans-
mission and the other for reception) whose size
may be up to 1023 bytes each. They can be
placed anywhere in memory (internally or exter-
nally).
For each endpoint, eight Register File locations
are used:
ADDRn_TH
and
ADDRn_TL
: These registers
point to the starting address of the memory buffer
containing thedata to be transmitted byendpoint n
at the next IN token addressed to it.
COUNTn_TL and COUNTn_TH
: These registers
contain the number of bytes to be transmitted by
endpoint n at the next IN token addressed to it.
ADDRn_RL and ADDRn_RH
: These registers
point to the starting address of the memory buffer
which will contain the data received by endpoint n
at the next OUT/SETUP token addressed to it.
COUNTn_RL and COUNTn_RH:
These registers
contain the allocated buffer size for endpoint n re-
ception, setting the maximum number of bytes the
related endpoint can receive with the next OUT/
SETUP transaction.
Other register locations related to unsupported
transfer directions or unused endpoints, are avail-
able to the user. Isochronous endpoints have a
special way of handling DMA buffers.
The relationship between register file locations
and memory buffer areas is depicted in Figure 70.
Each DMA buffer is used starting from the bottom,
either during reception or transmission.
The USB interface never changes the contents of
memory locations adjacent to the DMA memory
buffers; even if a packet bigger than the allocated
buffer length is received (buffer overrun condition)
the data will be copied in memory only up to the
last available location.
相关PDF资料
PDF描述
ST92163N4G0V 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
ST92163R4G0V 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
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ST92E163R4T1V 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
ST92T163R4T1V 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
相关代理商/技术参数
参数描述
ST92163N4G0E 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
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ST92163N4G1E 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT