参数资料
型号: ST92163N4G0
厂商: 意法半导体
英文描述: 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
中文描述: 16位产品全速USB微控制器16端点,20,000光盘和2K的RAM,I2C和脊髓损伤的复合设备,
文件页数: 139/224页
文件大小: 1372K
代理商: ST92163N4G0
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139/224
ST92163 - USB PERIPHERAL (USB)
USB INTERFACE (
Cont’d
)
Bit 0 = Reserved. This bit isfixed by hardware at 0.
INTERRUPT STATUS REGISTER (USBISTR)
R249 - Read/Write
Register page: 15
Reset Value: 0000 0000 (00h)
Each bit is set by hardware when therelated event
occurs.
If one of these bits is set, the hardware clears the
CTRO bit and sets the V[3:0] bits in the USBIVR
register. In this way the USBIVR register will point
to the interrupt vector containing the address of
the serviceroutine related to theseinterrupt sourc-
es. If several bits are set only asingle interrupt will
be generated.
Note:
to avoid spurious clearing of some bits, it is
recommended to clear themwith a load instruction
where all bits which must not be altered are set to
1, and all bits to be cleared are set to 0. Read-
modify-write instructions like AND, XOR,... are to
be avoided: consider the case of clearing bit 0 of
USBISTR with an AND instruction, when only bit 7
of USBISTR is at 1 and the others at 0. First the
microcontroller reads the content of USBISTR
(=10h), then it clears bit 7 and writes the result
(=00h) in USBISTR. If between the read and the
write operations another bit were set by hardware
(e.g. bit 5), writing 00h would clear it before the mi-
croprocessor has the time to service the event.
Table 24. Classificationof Interrupt Sources:
Bit 7= Reserved. Thisbit is fixedby hardware at 0.
Bit 6 =
DOVR
: DMA over/underrun
ST9 processor has not been able to answer a
DMA request in time and the USB FIFO buffer is
full or empty depending on the transfer direction
(reception or transmission).
The USB handles this event in the following way:
during reception the ACK handshake packet is not
sent, during transmission a bit-stuffing error is
forced on the transmitted stream. In both cases
the host will retry the transaction. The DOVR inter-
rupt should never occur during normal operations.
Bit 5 =
ERR
: Error
One of the errors listed below has occurred:
NANS
: No answer. The timeout for a host re-
sponse has expired.
CRC
: CRC error. One of the received CRCs, ei-
ther in the token or in the data, was wrong.
BST
: Bit Stuffing error. A bit stuffing error was
detected anywhere in thePID, data, and/or CRC.
FVIO
: Framing format violation. A nonstandard
frame was received (EOP not in the right place,
wrong token sequence, etc.).
BUFOVR
: Buffer overrun. A packet longer than
the allocated DMA buffer has been received.
7
0
0
DOVR
ERR
ESUSP
SUSP
RESET
SOF
ESOF
Interrupt
DOVR
ERR
ESUSP
SUSP
RESET
SOF
ESOF
Class
DMA Over/Underrun event
Notification event
Notification event
Notification event
Notification event
Notification event
Notification event
相关PDF资料
PDF描述
ST92163N4G0V 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT
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