参数资料
| 型号： | TISP61089BGDR-S |
| 厂商： | Bourns Inc. |
| 文件页数： | 9/20页 |
| 文件大小： | 0K |
| 描述： | PROTECTOR PROGRAMMABLE SLIC |
| 标准包装： | 2,500 |
| 电压 - 击穿： | 64V |
| 电压 - 断路： | 170V |
| 电流 - 峰值脉冲(10 x 1000µs)： | 30A |
| 电流 - 保持 (Ih)： | 150mA |
| 元件数： | 2 |
| 电容： | 100pF |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
TISP61089B High Voltage Ringing SLIC Protector
Gated Protectors (Continued)
protection voltage, the length of the capacitor to gate terminal tracking should be minimized. Inductive voltages in the protector cathode wiring
will also increase the protection voltage. These voltages can be minimized by routing the SLIC connection through the protector as shown in
Figure 6.
Figure 9, which has a 10 A/ μ s rate of impulse current rise, shows a positive gate charge (Q GS ) of about 0.1 μ C. With the 0.1 μ F gate
decoupling capacitor used, the increase in gate supply is about 1 V (= Q GS /C1). This change is just visible on the -72 V gate voltage, V BATH .
But, the voltage increase does not directly add to the protection voltage as the supply voltage change reaches a maximum at 0.4 μ s, when the
gate current reverses polarity, and the protection voltage peaks earlier at 0.3 μ s. In Figure 9, the peak clamping voltage (V (BO) ) is -77.5 V, an
increase of 5.5 V on the nominal gate supply voltage. This 5.5 V increase is the sum of the supply rail increase at that time, (0.5 V), and the
protection circuit’s cathode diode to supply rail breakover voltage (5 V). In practice, use of the recommended 220 nF gate decoupling capacitor
would give a supply rail increase of about 0.3 V and a V (BO) value of about -77.3 V.
0
-20
-40
-60
-80
VK
VBATH
0.0
0.5
1.0
1.5
Time - μ s
AI6XDE
1
0
-1
-2
-3
-4
-5
QGS
IG
IK
0.0
0.5
1.0
1.5
Time - μ s
Figure 9. Protector Fast Impulse Clamping and Switching Waveforms
Voltage Stress Levels on the TISP61089B
Figure 10 shows the protector electrodes. The package terminal designated gate, G, is the transistor base, B, electrode connection and so is
marked as B (G). The following junctions are subject to voltage stress: Transistor EB and CB, SCR AK (off state) and the antiparallel diode
(reverse blocking). This clause covers the necessary testing to ensure the junctions are good.
Testing transistor CB and EB: The maximum voltage stress level for the TISP61089B is V BATH with the addition of the short term antiparallel
diode voltage overshoot, V FRM . The current flowing out of the G terminal is measured at V BATH plus V FRM . The SCR K terminal is shorted to
the common (0 V) for this test (see Figure 10). The measured current, I GKS , is the sum of the junction currents I CB and I EB .
OCTOBER 2000 - REVISED JULY 2008
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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| TISP61089BSDR-S | 功能描述:SCR PROTECTOR - QUAD PROGRAMMABLE RoHS:否 制造商:STMicroelectronics 最大转折电流 IBO:480 A 额定重复关闭状态电压 VDRM:600 V 关闭状态漏泄电流（在 VDRM IDRM 下）:5 uA 开启状态 RMS 电流 (It RMS): 正向电压下降:1.6 V 栅触发电压 (Vgt):1.3 V 最大栅极峰值反向电压:5 V 栅触发电流 (Igt):35 mA 保持电流（Ih 最大值）:75 mA 安装风格:Through Hole 封装 / 箱体:TO-220 封装:Tube |
| TISP61089D | 功能描述:SCR Dual P Gate Forward Conducting RoHS:否 制造商:STMicroelectronics 最大转折电流 IBO:480 A 额定重复关闭状态电压 VDRM:600 V 关闭状态漏泄电流（在 VDRM IDRM 下）:5 uA 开启状态 RMS 电流 (It RMS): 正向电压下降:1.6 V 栅触发电压 (Vgt):1.3 V 最大栅极峰值反向电压:5 V 栅触发电流 (Igt):35 mA 保持电流（Ih 最大值）:75 mA 安装风格:Through Hole 封装 / 箱体:TO-220 封装:Tube |
| TISP61089DR | 功能描述:SCR Dual P Gate Forward Conducting RoHS:否 制造商:STMicroelectronics 最大转折电流 IBO:480 A 额定重复关闭状态电压 VDRM:600 V 关闭状态漏泄电流（在 VDRM IDRM 下）:5 uA 开启状态 RMS 电流 (It RMS): 正向电压下降:1.6 V 栅触发电压 (Vgt):1.3 V 最大栅极峰值反向电压:5 V 栅触发电流 (Igt):35 mA 保持电流（Ih 最大值）:75 mA 安装风格:Through Hole 封装 / 箱体:TO-220 封装:Tube |
| TISP61089DR-S | 功能描述:SCR Dual P Gate Forward Conducting RoHS:否 制造商:STMicroelectronics 最大转折电流 IBO:480 A 额定重复关闭状态电压 VDRM:600 V 关闭状态漏泄电流（在 VDRM IDRM 下）:5 uA 开启状态 RMS 电流 (It RMS): 正向电压下降:1.6 V 栅触发电压 (Vgt):1.3 V 最大栅极峰值反向电压:5 V 栅触发电流 (Igt):35 mA 保持电流（Ih 最大值）:75 mA 安装风格:Through Hole 封装 / 箱体:TO-220 封装:Tube |
| TISP61089DS | 制造商:Bourns Inc 功能描述: |
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