TMP19A43
Table 11-1 Differences in the Specifications of TMRB Modules
Channel
Specification
TMRB0
TMRB1
TMRB2
TMRB3
External clock/
capture trigger input pins
TB0IN0 (shared with P20)
TB0IN1 (shared with P21)
TB1IN0 (shared with P22)
TB1IN1 (shared with P23)
TB2IN0 (shared with PA6)
TB2IN1 (shared with PA7)
TB3IN0 (shared with PB0)
TB3IN1 (shared with PB1)
External
pins
Timer flip-flop output pin
TB0OUT (shared with P54)
TB1OUT (shared with P55)
TB2OUT (shared with P56)
TB3OUT (shared with P57)
Internal
signals
Timer for capture triggers
―
TB0OUT
TB0OUT
TB0OUT
Timer RUN register
Timer control register
Timer mode register
Timer flip-flop control
register
Timer status register
TB0RUN (0xFFFF_F140)
TB0CR (0xFFFF_F141)
TB0MOD (0xFFFF_F142)
TB1RUN (0xFFFF_F150)
TB1CR (0xFFFF_F151)
TB1MOD (0xFFFF_F152)
TB2RUN (0xFFFF_F160)
TB2CR (0xFFFF_F161)
TB2MOD (0xFFFF_F162)
TB3RUN (0xFFFF_F170)
TB3CR (0xFFFF_F171)
TB3MOD (0xFFFF_F172)
TB0FFCR (0xFFFF_F143)
TB1FFCR (0xFFFF_F153)
TB2FFCR (0xFFFF_F163)
TB3FFCR (0xFFFF_F173)
TB0ST (0xFFFF_F144)
TB0UCL
TB0UCH
TB0RG0L (0xFFFF_F148)
TB0RG0H (0xFFFF_F149)
TB0RG1L (0xFFFF_F14A)
TB0RG1H (0xFFFF_F14B)
TB0CP0L (0xFFFF_F14C)
TB0CP0H (0xFFFF_F14D)
TB0CP1L (0xFFFF_F14E)
TB0CP1H (0xFFFF_F14F)
TB1ST (0xFFFF_F154)
TB1UCL
TB1UCH
TB1RG0L (0xFFFF_F158)
TB1RG0H (0xFFFF_F159)
TB1RG1L (0xFFFF_F15A)
TB1RG1H (0xFFFF_F15B)
TB1CP0L (0xFFFF_F15C)
TB1CP0H (0xFFFF_F15D)
TB1CP1L (0xFFFF_F15E)
TB1CP1H (0xFFFF_F15F)
TB2ST (0xFFFF_F164)
TB2UCL
TB2UCH
TB2RG0L (0xFFFF_F168)
TB2RG0H (0xFFFF_F169)
TB2RG1L (0xFFFF_F16A)
TB2RG1H (0xFFFF_F16B)
TB2CP0L (0xFFFF_F16C)
TB2CP0H (0xFFFF_F16D)
TB2CP1L (0xFFFF_F16E)
TB2CP1H (0xFFFF_F16F)
TB3ST (0xFFFF_F174)
TB3UCL
TB3UCH
TB3RG0L (0xFFFF_F178)
TB3RG0H (0xFFFF_F179)
TB3RG1L (0xFFFF_F17A)
TB3RG1H (0xFFFF_F17B)
TB3CP0L (0xFFFF_F17C)
TB3CP0H (0xFFFF_F17D)
TB3CP1L (0xFFFF_F17E)
TB3CP1H (0xFFFF_F17F)
Timer UC preset register
Timer register
Register
names
(addresses)
Capture register
Channel
Specification
TMRB4
TMRB5
TMRB6
TMRB7
External clock/
capture trigger input pins
TB4IN0 (shared with P24)
TB4IN1 (shared with P25)
TB5IN0 (shared with P26)
TB5IN1 (shared with P27)
TB6IN0 (shared with PA0)
TB6IN1 (shared with PA1)
TB7IN0 (shared with PA2)
TB7IN1 (shared with PA3)
External
pins
Timer flip-flop output pin
TB4OUT (shared with P66)
TB5OUT (shared with P67)
TB6OUT (shared with P90)
TB7OUT (shared with P91)
Internal
signals
Timer for capture triggers
TB0OUT
TB0OUT
TB0OUT
TB0OUT
Timer RUN register
Timer control register
Timer mode register
Timer flip-flop control
register
Timer status register
TB4RUN (0xFFFF_F180)
TB4CR (0xFFFF_F181)
TB4MOD (0xFFFF_F182)
TB5RUN (0xFFFF_F190)
TB5CR (0xFFFF_F191)
TB5MOD (0xFFFF_F192)
TB6RUN (0xFFFF_F1A0)
TB6CR (0xFFFF_F1A1)
TB6MOD (0xFFFF_F1A2)
TB7RUN (0xFFFF_F1B0)
TB7CR (0xFFFF_F1B1)
TB7MOD (0xFFFF_F1B2)
TB4FFCR (0xFFFF_F183)
TB5FFCR (0xFFFF_F193)
TB6FFCR (0xFFFF_F1A3)
TB7FFCR (0xFFFF_F1B3)
TB4ST (0xFFFF_F184)
TB4UCL
TB4UCH
TB4RG0L (0xFFFF_F188)
TB4RG0H (0xFFFF_F189)
TB4RG1L (0xFFFF_F18A)
TB4RG1H (0xFFFF_F18B)
TB4CP0L (0xFFFF_F18C)
TB4CP0H (0xFFFF_F18D)
TB4CP1L (0xFFFF_F18E)
TB4CP1H (0xFFFF_F18F)
TB5ST (0xFFFF_F194)
TB5UCL
TB5UCH
TB5RG0L (0xFFFF_F198)
TB5RG0H (0xFFFF_F199)
TB5RG1L (0xFFFF_F19A)
TB5RG1H (0xFFFF_F19B)
TB5CP0L (0xFFFF_F19C)
TB5CP0H (0xFFFF_F19D)
TB5CP1L (0xFFFF_F19E)
TB5CP1H (0xFFFF_F19F)
TB6ST (0xFFFF_F1A4)
TB6UCL
TB6UCH
TB6RG0L (0xFFFF_F1A8)
TB6RG0H (0xFFFF_F1A9)
TB6RG1L (0xFFFF_F1AA)
TB6RG1H (0xFFFF_F1AB)
TB6CP0L (0xFFFF_F1AC)
TB6CP0H (0xFFFF_F1AD)
TB6CP1L (0xFFFF_F1AE)
TB6CP1H (0xFFFF_F1AF)
TB7ST (0xFFFF_F1B4)
TB7UCL
TB7UCH
TB7RG0L (0xFFFF_F1B8)
TB7RG0H (0xFFFF_F1B9)
TB7RG1L (0xFFFF_F1BA)
TB7RG1H (0xFFFF_F1BB)
TB7CP0L (0xFFFF_F1BC)
TB7CP0H (0xFFFF_F1BD)
TB7CP1L (0xFFFF_F1BE)
TB7CP1H (0xFFFF_F1BF)
Timer UC preset register
Timer register
Register
names
(addresses)
Capture register
TMP19A43(rev2.0)
11-2
16-bit Timer/Event Counters (TMRBs)