TMP19A43
21. ROM Correction Function
This chapter describes the ROM correction function built into the TMP19A43.
21.1 Features
Using this function, eight pieces of one-word data or four pieces of eight-word data can be replaced.
If an address (lower 5 or 2 bits are "don’t care" bits) written to the address register matches an address
generated by the PC or DMAC, ROM data is replaced by data generated by the ROM correction data
register which is established in a RAM area assigned to the above address register.
ROM correction is automatically authorized by writing an address to each address register.
If ROM correction cannot be executed using eight-word data due to a program modification or for other
reasons, it is possible to place a "jump-to-RAM" instruction in a data register in a RAM area and to
correct ROM data in that RAM area.
21.2 Description of Operations
By setting in the address register ADDREGn a physical address (including a projection area) of the ROM area to
be corrected, ROM data can be replaced by data generated by a data register in a RAM area assigned to
ADDREGn. The ROM correction function is automatically enabled when an address is set in ADDREGn, and it
cannot be disabled. After a reset, the ROM correction function is disabled. Therefore, to execute ROM
correction with the initialization after a reset is cleared, it is necessary to set an address in ADDREG. As an
address is set in ADDREG, the ROM correction function is enabled for this register. If the CPU has the bus
authority, ROM data is replaced when the value generated by the PC matches that of the address register. If the
DMAC has the bus authority, ROM data is replaced when a source or destination address generated by the
DMAC matches the value of the address register. For example, if an address is set in ADDREG0 and
ADDREG3, the ROM correction function is enabled for this area; match detection is performed on these
registers, and data replacement is executed if there is a match. Data replacement is not executed for ADDREG1,
ADDREG2, and ADDREG4 through ADDREG7. Although the bit <31:5> exists in address registers, match
detection is performed on A<20:5> for reasons of circuitry simplification. Internal processing is that data
replacement is executed when the calculation of a logical product is completed by multiplying the ROMCS
signal showing a ROM area by the result of a match detection operation performed by ROM correction circuitry.
If eight-word data is replaced, an address for ROM correction can be established only on an eight-word
boundary, and data is replaced in units of 32 bytes. If only part of 32-byte data must be replaced with different
data, the addresses that do not need to be replaced must be overwritten with the same data as the one existing
prior to data replacement.
ADDREGn registers and RAM areas assigned to them are as follows:
Register
ADDREG0
ADDREG1
ADDREG2
ADDREG3
ADDREG4
ADDREG5
ADDREG6
ADDREG7
ADDREG8
ADDREG9
ADDREGA
ADDREGB
Address
0xFFFF_E540
0xFFFF_E544
0xFFFF_E548
0xFFFF_E54C
0xFFFF_E550
0xFFFF_E554
0xFFFF_E558
0xFFFF_E55C
0xFFFF_E560
0xFFFF_E564
0xFFFF_E568
0xFFFF_E56C
RAM area
Number of words
8
8
8
8
1
1
1
1
1
1
1
1
0xFFFF_DF60 - 0xFFFF_DF7C
0xFFFF_DF80 - 0xFFFF_DF9C
0xFFFF_DFA0 - 0xFFFF_DFBC
0xFFFF_DFC0 - 0xFFFF_DFDC
0xFFFF_DFE0
0xFFFF_DFE4
0xFFFF_DFE8
0xFFFF_DFEC
0xFFFF_DFF0
0xFFFF_DFF4
0xFFFF_DFF8
0xFFFF_DFFC
Note:
To use the ROM correction function, the ROM must be unprotected.
TMP19A43(rev2.0)21-1
ROM Correction Function