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参数资料
| 型号： | TPS51727RHARG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PQCC40 |
| 封装： | 6 X 6 MM, GREEN, PLASTIC, QFN-40 |
| 文件页数： | 17/42页 |
| 文件大小： | 0K |
| 代理商： | TPS51727RHARG4 |
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Light Load Power Saving Features
MOSFET Drivers
Voltage Slewing
SLEW
K
V
R
SR
=
(3)
SLUS806B – APRIL 2008 – REVISED JANUARY 2009 ..................................................................................................................................................... www.ti.com
Implementation
OSR is implemented using a comparator between the DROOP and CMP nodes in Figure 1. To implement OSR,
simply terminate the OSRSEL pin to the desired voltage to set the threshold voltage for the comparator. The
settings are:
GND = Minimum voltage (Maximum reduction)
VREF = Medium voltage
+3.3V = Maximum voltage
5V = OSR off
Use the highest setting that provides the desired level of overshoot reduction to eliminate the possibility of false
OSR operation.
The TPS51727 has several power saving features to provide excellent efficiency over a very large load range.
One is the PCNT pin. This pin has a low voltage I/O level which can work with logic signals from 1V to 3.6V. A
LO on this pin puts the converter into single phase mode, thus eliminating the quiescent power of phase two
when high power is not needed.
In addition, the TPS51727 has an automatic pulse skipping "skip" mode. Regardless of the state of the logic
inputs, the converter senses negative inductor current flow and prevents it by shutting off the bottom
MOSFET(s). This saves power by eliminating recirculating current. When the bottom MOSFET shuts off, the
converter enters discontinuous mode, and the switching frequency decreases, thus reducing switching losses as
well.
The SLP signal is used to enter a low-power state where unnecessary circuitry is powered down to save
quiescent current for the lightest load conditions
The TPS51727 incorporates a pair of strong, high-performance gate drives with adaptive cross-conduction
protection. The driver uses the state of the DRVLx and LLx pins to be sure the top or bottom MOSFET is off
before turning the other on. Fast logic and high drive currents (up to 8 A typical!) quickly charge and discharge
MOSFET gates to minimize dead-time to increase efficiency. The top gate driver also includes an internal P-N
junction bootstrap diode, decreasing the size and cost of the external circuitry. For maximum efficiency, this
diode can be bypassed externally by connecting Schottky diodes from V5IN (anode) to VBSTx (cathode).
The TPS51727 ramps the internal DAC up and down to perform all voltage transitions. The timing is independent
of switching frequency, as well as output resistive and capacitive loading. It is set by a resistor from the ISLEW
pin to AGND (RSLEW). All voltage transitions have a single slew rate.
where
K
SLEW = 1.25 × 10
9
V
SLEW = 1.25 V
SR is the desired slew rate in units of mV/s
VSLEW is equal to the slew reference, VSLEWREF when RSLEW is tied to GND. Connecting RSLEW to VREF disables
24
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS51727
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